Hi, Richi. After I dig into the codes and experiment: https://godbolt.org/z/hMf5nsPeK
This example is VNx8QI, GCC works fine for RVV using 1-bit compact mask. ADJUST_PRECISION (VNx1BI, riscv_v_adjust_precision (VNx1BImode, 1)); ADJUST_PRECISION (VNx2BI, riscv_v_adjust_precision (VNx2BImode, 2)); ADJUST_PRECISION (VNx4BI, riscv_v_adjust_precision (VNx4BImode, 4)); ADJUST_PRECISION (VNx8BI, riscv_v_adjust_precision (VNx8BImode, 8)); ADJUST_PRECISION (VNx16BI, riscv_v_adjust_precision (VNx16BImode, 16)); ADJUST_PRECISION (VNx32BI, riscv_v_adjust_precision (VNx32BImode, 32)); ADJUST_PRECISION (VNx64BI, riscv_v_adjust_precision (VNx64BImode, 64)); ADJUST_PRECISION (VNx128BI, riscv_v_adjust_precision (VNx128BImode, 128)); The only problem is for VNx1BI, VNx2BI, VNx4BI since we use ADJUST_PRECISION to differentiate them with VNx8QI. VNx1BI, VNx2BI, VNx4BI is too small and GCC can not represent a mode with only 4bit size in GET_MODE_SIZE, now we use ADJUST_PRECISION to differentiate them. However, it cause loading bitmask for VNx1BI/VNx2BI/VNx4BI incorrectly, so this patch is to fix such in RISC-V backend. This is the RISC-V specific issue and would not happen on X86. Thanks. juzhe.zh...@rivai.ai From: Richard Biener Date: 2023-06-28 15:17 To: Jeff Law CC: Kito Cheng; juzhe.zh...@rivai.ai; gcc-patches; kito.cheng; palmer; palmer; Robin Dapp Subject: Re: [PATCH V2] RISC-V: Fix bug of pre-calculated const vector mask On Wed, Jun 28, 2023 at 6:09 AM Jeff Law via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > > > On 6/27/23 21:16, Kito Cheng wrote: > > Do you mind giving some comments about what the difference between the > > two versions? > And I'd like a before/after assembly code with the example in the commit > message. I didn't see the same behavior when I tried it earlier today > and ran out of time to dig into it further. > > Juzhe -- most folks wait ~1wk to ping patches, even codegen bugfixes. > Pinging this fast runs the risk of irritating others. Please be patient. I think if we get constant mask expansion wrong this has to be fixed in generic code. ISTR fixing similar issues with AVX512 compact masks. But maybe I'm misunderstanding the problem and the issue only exists in the backend? Richard. > Jeff
