On 17.07.2023 08:09, Hongtao Liu wrote: > On Fri, Jul 14, 2023 at 5:40 PM Jan Beulich via Gcc-patches > <gcc-patches@gcc.gnu.org> wrote: >> >> Introduce a new alternative permitting all 32 registers to be used as >> source without AVX512VL, by broadcasting to the full 512 bits in that >> case. (The insn would also permit all registers to be used as >> destination, but V2DFmode doesn't.) > The patch looks technically ok, but considering we don't have a real > CPU with only AVX512F but no AVX512VL, these optimisations for AVX512F > only don't make much sense, but rather increase the burden for > maintenance.
Well, I can of course ignore this aspect going forward. It seemed relevant to me for two reasons: For one, I expect I'm not the only one to simply pass -mavx512f when caring about basic AVX512. And then isn't the Knights line of processors (Xeon Phi) lacking VL? (I'm getting the impression though that this line is discontinued now.) >> Can't the latter two of the original alternatives be folded, by using >> Yvm instead of xm/vm? > I think yes. I guess I'll make a follow-on patch for that then. Jan
