> > Like I mentioned in the other thread, I think things went wrong when > we generated the subreg in this sign_extend. The operation should > have been a truncate of (reg/v:DI 200) followed by a sign extension > of the result. >
Sorry for my misunderstanding. So you mean that in the RTL, for this operation: we should have 3 (insn ) RTX? (zero_extract ) (truncate_64_to_32) (sign_extend_32_to_64) > What piece of code is generating the subreg? > > Thanks, > Richard -- YunQiang Su
