Hi,
this patch adds some missing tests for vf[nw]cvt.
Regards
Robin
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c:
Add tests.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h:
Ditto.
* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c:
Ditto.
---
.../rvv/autovec/conversions/vfncvt-ftoi-run.c | 96 +++++++++++++++++++
.../autovec/conversions/vfncvt-ftoi-rv32gcv.c | 6 +-
.../autovec/conversions/vfncvt-ftoi-rv64gcv.c | 6 +-
.../conversions/vfncvt-ftoi-template.h | 6 ++
.../autovec/conversions/vfncvt-itof-rv32gcv.c | 1 +
.../autovec/conversions/vfncvt-itof-rv64gcv.c | 4 +-
.../conversions/vfncvt-itof-template.h | 5 +-
.../conversions/vfncvt-itof-zvfh-run.c | 32 +++++++
.../autovec/conversions/vfwcvt-ftoi-rv32gcv.c | 4 +-
.../autovec/conversions/vfwcvt-ftoi-rv64gcv.c | 4 +-
.../conversions/vfwcvt-ftoi-template.h | 2 +
.../conversions/vfwcvt-ftoi-zvfh-run.c | 32 +++++++
.../rvv/autovec/conversions/vfwcvt-itof-run.c | 96 +++++++++++++++++++
.../autovec/conversions/vfwcvt-itof-rv32gcv.c | 4 +-
.../autovec/conversions/vfwcvt-itof-rv64gcv.c | 4 +-
.../conversions/vfwcvt-itof-template.h | 10 +-
.../conversions/vfwcvt-itof-zvfh-run.c | 10 +-
17 files changed, 302 insertions(+), 20 deletions(-)
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c
index ce3fcfa9af8..73eda067ba3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c
@@ -62,6 +62,38 @@ main ()
RUN2 (float, uint16_t, 4096)
RUN2 (float, uint16_t, 5975)
+ RUN (float, int8_t, 3)
+ RUN (float, int8_t, 4)
+ RUN (float, int8_t, 7)
+ RUN (float, int8_t, 99)
+ RUN (float, int8_t, 119)
+ RUN (float, int8_t, 128)
+ RUN (float, int8_t, 256)
+ RUN (float, int8_t, 279)
+ RUN (float, int8_t, 555)
+ RUN (float, int8_t, 1024)
+ RUN (float, int8_t, 1389)
+ RUN (float, int8_t, 2048)
+ RUN (float, int8_t, 3989)
+ RUN (float, int8_t, 4096)
+ RUN (float, int8_t, 5975)
+
+ RUN2 (float, uint8_t, 3)
+ RUN2 (float, uint8_t, 4)
+ RUN2 (float, uint8_t, 7)
+ RUN2 (float, uint8_t, 99)
+ RUN2 (float, uint8_t, 119)
+ RUN2 (float, uint8_t, 128)
+ RUN2 (float, uint8_t, 256)
+ RUN2 (float, uint8_t, 279)
+ RUN2 (float, uint8_t, 555)
+ RUN2 (float, uint8_t, 1024)
+ RUN2 (float, uint8_t, 1389)
+ RUN2 (float, uint8_t, 2048)
+ RUN2 (float, uint8_t, 3989)
+ RUN2 (float, uint8_t, 4096)
+ RUN2 (float, uint8_t, 5975)
+
RUN (double, int32_t, 3)
RUN (double, int32_t, 4)
RUN (double, int32_t, 7)
@@ -93,4 +125,68 @@ main ()
RUN2 (double, uint32_t, 3989)
RUN2 (double, uint32_t, 4096)
RUN2 (double, uint32_t, 5975)
+
+ RUN (double, int16_t, 3)
+ RUN (double, int16_t, 4)
+ RUN (double, int16_t, 7)
+ RUN (double, int16_t, 99)
+ RUN (double, int16_t, 119)
+ RUN (double, int16_t, 128)
+ RUN (double, int16_t, 256)
+ RUN (double, int16_t, 279)
+ RUN (double, int16_t, 555)
+ RUN (double, int16_t, 1024)
+ RUN (double, int16_t, 1389)
+ RUN (double, int16_t, 2048)
+ RUN (double, int16_t, 3989)
+ RUN (double, int16_t, 4096)
+ RUN (double, int16_t, 5975)
+
+ RUN2 (double, uint16_t, 3)
+ RUN2 (double, uint16_t, 4)
+ RUN2 (double, uint16_t, 7)
+ RUN2 (double, uint16_t, 99)
+ RUN2 (double, uint16_t, 119)
+ RUN2 (double, uint16_t, 128)
+ RUN2 (double, uint16_t, 256)
+ RUN2 (double, uint16_t, 279)
+ RUN2 (double, uint16_t, 555)
+ RUN2 (double, uint16_t, 1024)
+ RUN2 (double, uint16_t, 1389)
+ RUN2 (double, uint16_t, 2048)
+ RUN2 (double, uint16_t, 3989)
+ RUN2 (double, uint16_t, 4096)
+ RUN2 (double, uint16_t, 5975)
+
+ RUN (double, int8_t, 3)
+ RUN (double, int8_t, 4)
+ RUN (double, int8_t, 7)
+ RUN (double, int8_t, 99)
+ RUN (double, int8_t, 119)
+ RUN (double, int8_t, 128)
+ RUN (double, int8_t, 256)
+ RUN (double, int8_t, 279)
+ RUN (double, int8_t, 555)
+ RUN (double, int8_t, 1024)
+ RUN (double, int8_t, 1389)
+ RUN (double, int8_t, 2048)
+ RUN (double, int8_t, 3989)
+ RUN (double, int8_t, 4096)
+ RUN (double, int8_t, 5975)
+
+ RUN2 (double, uint8_t, 3)
+ RUN2 (double, uint8_t, 4)
+ RUN2 (double, uint8_t, 7)
+ RUN2 (double, uint8_t, 99)
+ RUN2 (double, uint8_t, 119)
+ RUN2 (double, uint8_t, 128)
+ RUN2 (double, uint8_t, 256)
+ RUN2 (double, uint8_t, 279)
+ RUN2 (double, uint8_t, 555)
+ RUN2 (double, uint8_t, 1024)
+ RUN2 (double, uint8_t, 1389)
+ RUN2 (double, uint8_t, 2048)
+ RUN2 (double, uint8_t, 3989)
+ RUN2 (double, uint8_t, 4096)
+ RUN2 (double, uint8_t, 5975)
}
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c
index 4bed5eb7fff..43967af1cd5 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c
@@ -1,7 +1,9 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh
-mabi=ilp32d --param=riscv-autovec-preference=scalable" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh
-mabi=ilp32d -fno-trapping-math --param=riscv-autovec-preference=scalable" } */
#include "vfncvt-ftoi-template.h"
-/* { dg-final { scan-assembler-times {\tvfncvt\.rtz\.x\.f\.w} 3 } } */
+/* The vectorizer only performs int -> float conversions with
+ intermediate types with -fno-trapping-math. */
+/* { dg-final { scan-assembler-times {\tvfncvt\.rtz\.x\.f\.w} 9 } } */
/* { dg-final { scan-assembler-times {\tvfncvt\.rtz\.xu\.f\.w} 3 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c
index 7efc3f31c26..d49370bb925 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c
@@ -1,7 +1,9 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh
-mabi=lp64d --param=riscv-autovec-preference=scalable" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh
-mabi=lp64d -fno-trapping-math --param=riscv-autovec-preference=scalable" } */
#include "vfncvt-ftoi-template.h"
-/* { dg-final { scan-assembler-times {\tvfncvt\.rtz\.x\.f\.w} 3 } } */
+/* The vectorizer only performs int -> float conversions with
+ intermediate types with -fno-trapping-math. */
+/* { dg-final { scan-assembler-times {\tvfncvt\.rtz\.x\.f\.w} 9 } } */
/* { dg-final { scan-assembler-times {\tvfncvt\.rtz\.xu\.f\.w} 3 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h
index c6efbf15eca..c334e26e60c 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h
@@ -11,8 +11,14 @@
#define TEST_ALL()
\
TEST (double, int32_t)
\
TEST (double, uint32_t)
\
+ TEST (double, int16_t)
\
+ TEST (double, uint16_t)
\
+ TEST (double, int8_t)
\
+ TEST (double, uint8_t)
\
TEST (float, int16_t)
\
TEST (float, uint16_t) \
+ TEST (float, int8_t) \
+ TEST (float, uint8_t)
\
TEST (_Float16, int8_t) \
TEST (_Float16, uint8_t) \
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c
index dd5b95c903d..73e4644658b 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c
@@ -3,5 +3,6 @@
#include "vfncvt-itof-template.h"
+/* { dg-final { scan-assembler-times {\tvfcvt\.f\.x\.v} 2 } } */
/* { dg-final { scan-assembler-times {\tvfncvt\.f\.x\.w} 2 } } */
/* { dg-final { scan-assembler-times {\tvfncvt\.f\.xu\.w} 2 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c
index b3bdeced81d..e9d31a70e6a 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c
@@ -3,5 +3,5 @@
#include "vfncvt-itof-template.h"
-/* { dg-final { scan-assembler-times {\tvfncvt\.f\.x\.w} 2 } } */
-/* { dg-final { scan-assembler-times {\tvfncvt\.f\.xu\.w} 2 } } */
+/* { dg-final { scan-assembler-times {\tvfncvt\.f\.x\.w} 5 } } */
+/* { dg-final { scan-assembler-times {\tvfncvt\.f\.xu\.w} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
index b06deeb3d72..c427cd167f6 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h
@@ -6,12 +6,15 @@
TYPE1 *restrict a, int n) \
{ \
for (int i = 0; i < n; i++) \
- dst[i] = (TYPE2) a[i]; \
+ dst[i] = (TYPE2) (a[i] & 0x7ffffffful); \
}
+
#define TEST_ALL() \
TEST (int64_t, float) \
TEST (uint64_t, float) \
+ TEST (int64_t, _Float16) \
+ TEST (uint64_t, _Float16) \
TEST (int32_t, _Float16) \
TEST (uint32_t, _Float16) \
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
index b4e59c65ac7..2fb9b0c7b89 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c
@@ -61,4 +61,36 @@ main ()
RUN2 (uint32_t, _Float16, 3989)
RUN2 (uint32_t, _Float16, 4096)
RUN2 (uint32_t, _Float16, 5975)
+
+ RUN (int64_t, _Float16, 3)
+ RUN (int64_t, _Float16, 4)
+ RUN (int64_t, _Float16, 7)
+ RUN (int64_t, _Float16, 99)
+ RUN (int64_t, _Float16, 119)
+ RUN (int64_t, _Float16, 128)
+ RUN (int64_t, _Float16, 256)
+ RUN (int64_t, _Float16, 279)
+ RUN (int64_t, _Float16, 555)
+ RUN (int64_t, _Float16, 1024)
+ RUN (int64_t, _Float16, 1389)
+ RUN (int64_t, _Float16, 2048)
+ RUN (int64_t, _Float16, 3989)
+ RUN (int64_t, _Float16, 4096)
+ RUN (int64_t, _Float16, 5975)
+
+ RUN2 (uint64_t, _Float16, 3)
+ RUN2 (uint64_t, _Float16, 4)
+ RUN2 (uint64_t, _Float16, 7)
+ RUN2 (uint64_t, _Float16, 99)
+ RUN2 (uint64_t, _Float16, 119)
+ RUN2 (uint64_t, _Float16, 128)
+ RUN2 (uint64_t, _Float16, 256)
+ RUN2 (uint64_t, _Float16, 279)
+ RUN2 (uint64_t, _Float16, 555)
+ RUN2 (uint64_t, _Float16, 1024)
+ RUN2 (uint64_t, _Float16, 1389)
+ RUN2 (uint64_t, _Float16, 2048)
+ RUN2 (uint64_t, _Float16, 3989)
+ RUN2 (uint64_t, _Float16, 4096)
+ RUN2 (uint64_t, _Float16, 5975)
}
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c
index ce2bea48067..0ab42af6d70 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh
-mabi=ilp32d --param=riscv-autovec-preference=scalable" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh
-mabi=ilp32d -fno-trapping-math --param=riscv-autovec-preference=scalable" } */
#include "vfwcvt-ftoi-template.h"
-/* { dg-final { scan-assembler-times {\tvfwcvt\.rtz\.x\.f\.v} 2 } } */
+/* { dg-final { scan-assembler-times {\tvfwcvt\.rtz\.x\.f\.v} 4 } } */
/* { dg-final { scan-assembler-times {\tvfwcvt\.rtz\.xu\.f\.v} 2 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c
index 99aa3de4281..e1a4b631423 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh
-mabi=lp64d --param=riscv-autovec-preference=scalable" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh
-mabi=lp64d -fno-trapping-math --param=riscv-autovec-preference=scalable" } */
#include "vfwcvt-ftoi-template.h"
-/* { dg-final { scan-assembler-times {\tvfwcvt\.rtz\.x\.f\.v} 2 } } */
+/* { dg-final { scan-assembler-times {\tvfwcvt\.rtz\.x\.f\.v} 4 } } */
/* { dg-final { scan-assembler-times {\tvfwcvt\.rtz\.xu\.f\.v} 2 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h
index a276351bf69..aef03859d2b 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h
@@ -9,6 +9,8 @@
}
#define TEST_ALL()
\
+ TEST (_Float16, int64_t)
\
+ TEST (_Float16, uint64_t)
\
TEST (_Float16, int32_t)
\
TEST (_Float16, uint32_t)
\
TEST (float, int64_t)
\
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
index 15bcd05b592..5bf4bc99037 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c
@@ -61,4 +61,36 @@ main ()
RUN2 (_Float16, uint32_t, 3989)
RUN2 (_Float16, uint32_t, 4096)
RUN2 (_Float16, uint32_t, 5975)
+
+ RUN (_Float16, int64_t, 3)
+ RUN (_Float16, int64_t, 4)
+ RUN (_Float16, int64_t, 7)
+ RUN (_Float16, int64_t, 99)
+ RUN (_Float16, int64_t, 119)
+ RUN (_Float16, int64_t, 128)
+ RUN (_Float16, int64_t, 256)
+ RUN (_Float16, int64_t, 279)
+ RUN (_Float16, int64_t, 555)
+ RUN (_Float16, int64_t, 1024)
+ RUN (_Float16, int64_t, 1389)
+ RUN (_Float16, int64_t, 2048)
+ RUN (_Float16, int64_t, 3989)
+ RUN (_Float16, int64_t, 4096)
+ RUN (_Float16, int64_t, 5975)
+
+ RUN2 (_Float16, uint64_t, 3)
+ RUN2 (_Float16, uint64_t, 4)
+ RUN2 (_Float16, uint64_t, 7)
+ RUN2 (_Float16, uint64_t, 99)
+ RUN2 (_Float16, uint64_t, 119)
+ RUN2 (_Float16, uint64_t, 128)
+ RUN2 (_Float16, uint64_t, 256)
+ RUN2 (_Float16, uint64_t, 279)
+ RUN2 (_Float16, uint64_t, 555)
+ RUN2 (_Float16, uint64_t, 1024)
+ RUN2 (_Float16, uint64_t, 1389)
+ RUN2 (_Float16, uint64_t, 2048)
+ RUN2 (_Float16, uint64_t, 3989)
+ RUN2 (_Float16, uint64_t, 4096)
+ RUN2 (_Float16, uint64_t, 5975)
}
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c
index b9287f69558..a90faef462f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c
@@ -30,6 +30,70 @@
int
main ()
{
+ RUN (int8_t, float, 3)
+ RUN (int8_t, float, 4)
+ RUN (int8_t, float, 7)
+ RUN (int8_t, float, 99)
+ RUN (int8_t, float, 119)
+ RUN (int8_t, float, 128)
+ RUN (int8_t, float, 256)
+ RUN (int8_t, float, 279)
+ RUN (int8_t, float, 555)
+ RUN (int8_t, float, 1024)
+ RUN (int8_t, float, 1389)
+ RUN (int8_t, float, 2048)
+ RUN (int8_t, float, 3989)
+ RUN (int8_t, float, 4096)
+ RUN (int8_t, float, 5975)
+
+ RUN2 (uint8_t, float, 3)
+ RUN2 (uint8_t, float, 4)
+ RUN2 (uint8_t, float, 7)
+ RUN2 (uint8_t, float, 99)
+ RUN2 (uint8_t, float, 119)
+ RUN2 (uint8_t, float, 128)
+ RUN2 (uint8_t, float, 256)
+ RUN2 (uint8_t, float, 279)
+ RUN2 (uint8_t, float, 555)
+ RUN2 (uint8_t, float, 1024)
+ RUN2 (uint8_t, float, 1389)
+ RUN2 (uint8_t, float, 2048)
+ RUN2 (uint8_t, float, 3989)
+ RUN2 (uint8_t, float, 4096)
+ RUN2 (uint8_t, float, 5975)
+
+ RUN (int8_t, double, 3)
+ RUN (int8_t, double, 4)
+ RUN (int8_t, double, 7)
+ RUN (int8_t, double, 99)
+ RUN (int8_t, double, 119)
+ RUN (int8_t, double, 128)
+ RUN (int8_t, double, 256)
+ RUN (int8_t, double, 279)
+ RUN (int8_t, double, 555)
+ RUN (int8_t, double, 1024)
+ RUN (int8_t, double, 1389)
+ RUN (int8_t, double, 2048)
+ RUN (int8_t, double, 3989)
+ RUN (int8_t, double, 4096)
+ RUN (int8_t, double, 5975)
+
+ RUN2 (uint8_t, double, 3)
+ RUN2 (uint8_t, double, 4)
+ RUN2 (uint8_t, double, 7)
+ RUN2 (uint8_t, double, 99)
+ RUN2 (uint8_t, double, 119)
+ RUN2 (uint8_t, double, 128)
+ RUN2 (uint8_t, double, 256)
+ RUN2 (uint8_t, double, 279)
+ RUN2 (uint8_t, double, 555)
+ RUN2 (uint8_t, double, 1024)
+ RUN2 (uint8_t, double, 1389)
+ RUN2 (uint8_t, double, 2048)
+ RUN2 (uint8_t, double, 3989)
+ RUN2 (uint8_t, double, 4096)
+ RUN2 (uint8_t, double, 5975)
+
RUN (int16_t, float, 3)
RUN (int16_t, float, 4)
RUN (int16_t, float, 7)
@@ -62,6 +126,38 @@ main ()
RUN2 (uint16_t, float, 4096)
RUN2 (uint16_t, float, 5975)
+ RUN (int16_t, double, 3)
+ RUN (int16_t, double, 4)
+ RUN (int16_t, double, 7)
+ RUN (int16_t, double, 99)
+ RUN (int16_t, double, 119)
+ RUN (int16_t, double, 128)
+ RUN (int16_t, double, 256)
+ RUN (int16_t, double, 279)
+ RUN (int16_t, double, 555)
+ RUN (int16_t, double, 1024)
+ RUN (int16_t, double, 1389)
+ RUN (int16_t, double, 2048)
+ RUN (int16_t, double, 3989)
+ RUN (int16_t, double, 4096)
+ RUN (int16_t, double, 5975)
+
+ RUN2 (uint16_t, double, 3)
+ RUN2 (uint16_t, double, 4)
+ RUN2 (uint16_t, double, 7)
+ RUN2 (uint16_t, double, 99)
+ RUN2 (uint16_t, double, 119)
+ RUN2 (uint16_t, double, 128)
+ RUN2 (uint16_t, double, 256)
+ RUN2 (uint16_t, double, 279)
+ RUN2 (uint16_t, double, 555)
+ RUN2 (uint16_t, double, 1024)
+ RUN2 (uint16_t, double, 1389)
+ RUN2 (uint16_t, double, 2048)
+ RUN2 (uint16_t, double, 3989)
+ RUN2 (uint16_t, double, 4096)
+ RUN2 (uint16_t, double, 5975)
+
RUN (int32_t, double, 3)
RUN (int32_t, double, 4)
RUN (int32_t, double, 7)
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c
index 898b9c17231..cf180992c5d 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c
@@ -3,5 +3,7 @@
#include "vfwcvt-itof-template.h"
-/* { dg-final { scan-assembler-times {\tvfwcvt\.f\.x\.v} 3 } } */
+/* Conversions that the vectorizer does via multiple intermediate
+ types end up as signed conversions. */
+/* { dg-final { scan-assembler-times {\tvfwcvt\.f\.x\.v} 9 } } */
/* { dg-final { scan-assembler-times {\tvfwcvt\.f\.xu\.v} 3 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c
index e177b63738c..b1153887bd8 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c
@@ -3,5 +3,7 @@
#include "vfwcvt-itof-template.h"
-/* { dg-final { scan-assembler-times {\tvfwcvt\.f\.x\.v} 3 } } */
+/* Conversions that the vectorizer does via multiple intermediate
+ types end up as signed conversions. */
+/* { dg-final { scan-assembler-times {\tvfwcvt\.f\.x\.v} 9 } } */
/* { dg-final { scan-assembler-times {\tvfwcvt\.f\.xu\.v} 3 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h
index bd6d2387063..e78647f63a0 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h
@@ -10,11 +10,17 @@
}
#define TEST_ALL() \
+ TEST (int8_t, _Float16) \
+ TEST (uint8_t, _Float16) \
+ TEST (int8_t, float) \
+ TEST (uint8_t, float) \
+ TEST (int8_t, double) \
+ TEST (uint8_t, double) \
TEST (int16_t, float) \
TEST (uint16_t, float) \
+ TEST (int16_t, double) \
+ TEST (uint16_t, double) \
TEST (int32_t, double) \
TEST (uint32_t, double) \
- TEST (int8_t, _Float16) \
- TEST (uint8_t, _Float16) \
TEST_ALL ()
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
index f89dc46d65f..15e33200f10 100644
---
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c
@@ -37,9 +37,9 @@ main ()
RUN (int8_t, _Float16, 20)
RUN (int8_t, _Float16, 27)
- RUN (int8_t, _Float16, 4)
- RUN (int8_t, _Float16, 8)
- RUN (int8_t, _Float16, 11)
- RUN (int8_t, _Float16, 29)
- RUN (int8_t, _Float16, 49)
+ RUN (uint8_t, _Float16, 4)
+ RUN (uint8_t, _Float16, 8)
+ RUN (uint8_t, _Float16, 11)
+ RUN (uint8_t, _Float16, 29)
+ RUN (uint8_t, _Float16, 49)
}
--
2.41.0
