The tests manipulate the return address in abitest-2.h and thus not compatible with -mbranch-protection=pac-ret+leaf or -mbranch-protection=gcs.
gcc/testsuite/ChangeLog: * gcc.target/aarch64/aapcs64/func-ret-1.c: Disable branch-protection. * gcc.target/aarch64/aapcs64/func-ret-2.c: Likewise. * gcc.target/aarch64/aapcs64/func-ret-3.c: Likewise. * gcc.target/aarch64/aapcs64/func-ret-4.c: Likewise. * gcc.target/aarch64/aapcs64/func-ret-64x1_1.c: Likewise. --- gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c | 1 + gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c | 1 + gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c | 1 + gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c | 1 + gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c | 1 + 5 files changed, 5 insertions(+) diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c index 5405e1e4920..7bd7757efe6 100644 --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c @@ -4,6 +4,7 @@ AAPCS64 \S 4.1. */ /* { dg-do run { target aarch64*-*-* } } */ +/* { dg-additional-options "-mbranch-protection=none" } */ /* { dg-additional-sources "abitest.S" } */ #ifndef IN_FRAMEWORK diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c index 6b171c46fbb..85a822ace4a 100644 --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c @@ -4,6 +4,7 @@ Homogeneous floating-point aggregate types are covered in func-ret-3.c. */ /* { dg-do run { target aarch64*-*-* } } */ +/* { dg-additional-options "-mbranch-protection=none" } */ /* { dg-additional-sources "abitest.S" } */ #ifndef IN_FRAMEWORK diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c index ad312b675b9..1d35ebf14b4 100644 --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c @@ -4,6 +4,7 @@ in AAPCS64 \S 4.3.5. */ /* { dg-do run { target aarch64-*-* } } */ +/* { dg-additional-options "-mbranch-protection=none" } */ /* { dg-additional-sources "abitest.S" } */ /* { dg-require-effective-target aarch64_big_endian } */ diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c index af05fbe9fdf..15e1408c62d 100644 --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c @@ -5,6 +5,7 @@ are treated as general composite types. */ /* { dg-do run { target aarch64*-*-* } } */ +/* { dg-additional-options "-mbranch-protection=none" } */ /* { dg-additional-sources "abitest.S" } */ /* { dg-require-effective-target aarch64_big_endian } */ diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c index 05957e2dcae..fe7bbb6a835 100644 --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c @@ -3,6 +3,7 @@ Test 64-bit singleton vector types which should be in FP/SIMD registers. */ /* { dg-do run { target aarch64*-*-* } } */ +/* { dg-additional-options "-mbranch-protection=none" } */ /* { dg-additional-sources "abitest.S" } */ #ifndef IN_FRAMEWORK -- 2.25.1