On Thu, Aug 24, 2023 at 09:19:51PM -0500, Peter Bergner wrote: > On 8/24/23 12:35 PM, Michael Meissner wrote: > > On Thu, Jul 20, 2023 at 10:05:28AM +0530, jeevitha wrote: > >> gcc/ > >> PR target/110411 > >> * config/rs6000/rs6000.h (enum rs6000_builtin_type_index): Add fields > >> to hold PTImode type. > >> * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Add node > >> for PTImode type. > > > > It is good as far as it goes, but I suspect we will eventually need to > > extend > > it. In particular, the reason people need PTImode is they need the even/odd > > register layout. What you've done enables users to declare this value. > > Sure, it could be extended, but that is not what this patch is about. > It's purely to allow the kernel team access to the guaranteed even/odd > register layout for some inline asm code. Any extension would be a > follow-on patch to this.
I think we need to get the intended users to try the compiler out, and see if something else happens down the road that we didn't think of. I tend to think of these things like the children's story "If you give a mouse a cookie", which in turn leads to another thing and then another. As I said, I would expect it would be temptimg to start use these types with either 8 byte atomic built-ins, or do masks, etc. In a way, it sort of reminds me of OOmode, where we have this opaque type to load two vectors, but when you start trying to access the two separate registers, you get all sorts of moves, because the compiler underneath the covers doesn't really know it is two registers. In general, I tend that people don't tend to have a full 128-bit integer, but instead you have a structure with two fields, one is the lock and one is the data. So you want to load things together (or do compare/swap, etc.) and then you want to split the parts into 2 pieces, and then later, combine them back into the PTImode container. I really wish we had a constraint that matched the 2nd register in a multi-word register (not an output operation, a constraint so that the register allocator could know that you want to overlap a register). -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meiss...@linux.ibm.com
