On Thu, 2023-08-31 at 17:08 +0800, Chenghui Pan wrote: > This is an update of: > https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628303.html > > Changes since last version of patch set: > - "dg-skip-if"-related Changes of the g++.dg/torture/vshuf* testcases are > reverted. > (Replaced by __builtin_shuffle fix) > - Add fix of __builtin_shuffle() for Loongson SX/ASX (Implemeted by adding > vand/xvand insn in front of shuffle operation). There's no significant > performance > impact in current state.
I think it's the correct fix, thanks! I'm still unsure about the "partly saved register" issue (I'll need to resolve similar issues for "ILP32 ABI on loongarch64") but it seems GCC just don't attempt to preserve any vectors in register across function call. After the patches are committed I (and Xuerui, maybe) will perform full system rebuild with LASX enabled to see if there are subtle issues. IMO we still have plenty of time to fix them (if there are any) before GCC 14 release. > - Rebased on the top of Yang Yujie's latest target configuration interface > patch set > (https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628772.html). > > Brief history of patch set: > v1 -> v2: > - Reduce usage of "unspec" in RTL template. > - Append Support of ADDR_REG_REG in LSX and LASX. > - Constraint docs are appended in gcc/doc/md.texi and ccomment block. > - Codes related to vecarg are removed. > - Testsuite of LSX and LASX is added in v2. (Because of the size limitation of > mail list, these patches are not shown) > - Adjust the loongarch_expand_vector_init() function to reduce instruction > output amount. > - Some minor implementation changes of RTL templates. > > v2 -> v3: > - Revert vabsd/xvabsd RTL templates to unspec impl. > - Resolve warning in gcc/config/loongarch/loongarch.cc when bootstrapping > with BOOT_CFLAGS="-O2 -ftree-vectorize -fno-vect-cost-model -mlasx". > - Remove redundant definitions in lasxintrin.h. > - Refine commit info. > > v3 -> v4: > - Code simplification. > - Testsuite patches are splited from this patch set again and will be > submitted independently in the future. > > v4 -> v5: > - Regression test fix (pr54346.c) > - Combine vilvh/xvilvh insn's RTL template impl. > - Add dg-skip-if for loongarch*-*-* in vshuf test inside g++.dg/torture > (reverted in this version) > > Lulu Cheng (4): > LoongArch: Add Loongson SX base instruction support. > LoongArch: Add Loongson SX directive builtin function support. > LoongArch: Add Loongson ASX base instruction support. > LoongArch: Add Loongson ASX directive builtin function support. > > gcc/config.gcc | 2 +- > gcc/config/loongarch/constraints.md | 131 +- > gcc/config/loongarch/genopts/loongarch.opt.in | 4 + > gcc/config/loongarch/lasx.md | 5104 ++++++++++++++++ > gcc/config/loongarch/lasxintrin.h | 5338 +++++++++++++++++ > gcc/config/loongarch/loongarch-builtins.cc | 2686 ++++++++- > gcc/config/loongarch/loongarch-ftypes.def | 666 +- > gcc/config/loongarch/loongarch-modes.def | 39 + > gcc/config/loongarch/loongarch-protos.h | 35 + > gcc/config/loongarch/loongarch.cc | 4751 ++++++++++++++- > gcc/config/loongarch/loongarch.h | 117 +- > gcc/config/loongarch/loongarch.md | 56 +- > gcc/config/loongarch/loongarch.opt | 4 + > gcc/config/loongarch/lsx.md | 4467 ++++++++++++++ > gcc/config/loongarch/lsxintrin.h | 5181 ++++++++++++++++ > gcc/config/loongarch/predicates.md | 333 +- > gcc/doc/md.texi | 11 + > 17 files changed, 28645 insertions(+), 280 deletions(-) > create mode 100644 gcc/config/loongarch/lasx.md > create mode 100644 gcc/config/loongarch/lasxintrin.h > create mode 100644 gcc/config/loongarch/lsx.md > create mode 100644 gcc/config/loongarch/lsxintrin.h > -- Xi Ruoyao <xry...@xry111.site> School of Aerospace Science and Technology, Xidian University
