Wilco Dijkstra <wilco.dijks...@arm.com> writes: > List official cores first so that -cpu=native does not show a codename with -v > or in errors/warnings.
Nice spot. > Passes regress, OK for commit? > > gcc/ChangeLog: > * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares. > (neoverse-v1): Place before zeus. > (neoverse-v2): Place before demeter. > * config/aarch64/aarch64-tune.md: Regenerate. OK, thanks. OK for backports too from my POV. Richard > --- > > diff --git a/gcc/config/aarch64/aarch64-cores.def > b/gcc/config/aarch64/aarch64-cores.def > index > dbac497ef3aab410eb81db185b2e9532186888bb..3894f2afc27e71523e5a413fa45c144222082934 > 100644 > --- a/gcc/config/aarch64/aarch64-cores.def > +++ b/gcc/config/aarch64/aarch64-cores.def > @@ -115,8 +115,8 @@ AARCH64_CORE("cortex-a65", cortexa65, cortexa53, V8_2A, > (F16, RCPC, DOTPROD, S > AARCH64_CORE("cortex-a65ae", cortexa65ae, cortexa53, V8_2A, (F16, RCPC, > DOTPROD, SSBS), cortexa73, 0x41, 0xd43, -1) > AARCH64_CORE("cortex-x1", cortexx1, cortexa57, V8_2A, (F16, RCPC, DOTPROD, > SSBS, PROFILE), neoversen1, 0x41, 0xd44, -1) > AARCH64_CORE("cortex-x1c", cortexx1c, cortexa57, V8_2A, (F16, RCPC, > DOTPROD, SSBS, PROFILE, PAUTH), neoversen1, 0x41, 0xd4c, -1) > -AARCH64_CORE("ares", ares, cortexa57, V8_2A, (F16, RCPC, DOTPROD, > PROFILE), neoversen1, 0x41, 0xd0c, -1) > AARCH64_CORE("neoverse-n1", neoversen1, cortexa57, V8_2A, (F16, RCPC, > DOTPROD, PROFILE), neoversen1, 0x41, 0xd0c, -1) > +AARCH64_CORE("ares", ares, cortexa57, V8_2A, (F16, RCPC, DOTPROD, > PROFILE), neoversen1, 0x41, 0xd0c, -1) > AARCH64_CORE("neoverse-e1", neoversee1, cortexa53, V8_2A, (F16, RCPC, > DOTPROD, SSBS), cortexa73, 0x41, 0xd4a, -1) > > /* Cavium ('C') cores. */ > @@ -143,8 +143,8 @@ AARCH64_CORE("thunderx3t110", thunderx3t110, > thunderx3t110, V8_3A, (CRYPTO, S > /* ARMv8.4-A Architecture Processors. */ > > /* Arm ('A') cores. */ > -AARCH64_CORE("zeus", zeus, cortexa57, V8_4A, (SVE, I8MM, BF16, PROFILE, > SSBS, RNG), neoversev1, 0x41, 0xd40, -1) > AARCH64_CORE("neoverse-v1", neoversev1, cortexa57, V8_4A, (SVE, I8MM, BF16, > PROFILE, SSBS, RNG), neoversev1, 0x41, 0xd40, -1) > +AARCH64_CORE("zeus", zeus, cortexa57, V8_4A, (SVE, I8MM, BF16, PROFILE, > SSBS, RNG), neoversev1, 0x41, 0xd40, -1) > AARCH64_CORE("neoverse-512tvb", neoverse512tvb, cortexa57, V8_4A, (SVE, > I8MM, BF16, PROFILE, SSBS, RNG), neoverse512tvb, INVALID_IMP, INVALID_CORE, > -1) > > /* Qualcomm ('Q') cores. */ > @@ -182,7 +182,7 @@ AARCH64_CORE("cortex-x3", cortexx3, cortexa57, V9A, > (SVE2_BITPERM, MEMTAG, I8M > > AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, V9A, (I8MM, BF16, > SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversen2, 0x41, 0xd49, -1) > > -AARCH64_CORE("demeter", demeter, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, > RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1) > AARCH64_CORE("neoverse-v2", neoversev2, cortexa57, V9A, (I8MM, BF16, > SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1) > +AARCH64_CORE("demeter", demeter, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, > RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1) > > #undef AARCH64_CORE > diff --git a/gcc/config/aarch64/aarch64-tune.md > b/gcc/config/aarch64/aarch64-tune.md > index > 2170980dddb0d5d410a49631ad26ff2e346b39dd..69e53222257fa814e4733b05f7164bfa11e4aa04 > 100644 > --- a/gcc/config/aarch64/aarch64-tune.md > +++ b/gcc/config/aarch64/aarch64-tune.md > @@ -1,5 +1,5 @@ > ;; -*- buffer-read-only: t -*- > ;; Generated automatically by gentune.sh from aarch64-cores.def > (define_attr "tune" > - > "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa520,cortexa710,cortexa715,cortexx2,cortexx3,neoversen2,demeter,neoversev2" > + > "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa520,cortexa710,cortexa715,cortexx2,cortexx3,neoversen2,neoversev2,demeter" > (const (symbol_ref "((enum attr_tune) aarch64_tune)")))