On 9/15/23 10:48, Vladimir Makarov wrote:
On 9/14/23 06:45, Surya Kumari Jangala wrote:
ira: Consider save/restore costs of callee-save registers [PR110071]
In improve_allocation() routine, IRA checks for each allocno if spilling
any conflicting allocnos can improve the allocation of this allocno.
This routine computes the cost improvement for usage of each profitable
hard register for a given allocno. The existing code in
improve_allocation() does not consider the save/restore costs of callee
save registers while computing the cost improvement.
This can result in a callee save register being assigned to a pseudo
that is live in the entire function and across a call, overriding a
non-callee save register assigned to the pseudo by graph coloring. So
the entry basic block requires a prolog, thereby causing shrink wrap to
fail.
Yes, that can be a problem. The general idea is ok for me and common
sense says me that the performance should be better but I would like
to benchmark the patch on x86-64 spec2017 first. Real applications
have high register pressure and results might be not what we expect.
So I'll do it, report the results, and give my approval if there is no
big performance degradation. I think the results will be ready on
Monday.
I've benchmarked the patch on x86-64. Specint2017 rate changed from
8.54 to 8.51 and specfp2017 rate changed from 21.1 to 21.2. It is
probably in a range of measurement error.
So the patch is ok for me to commit. Thank you for working on the issue.