Hi Lehua,
> +(define_expand "vcond_mask_<mode><vm>"
> + [(set (match_operand:V_VLS 0 "register_operand")
> + (if_then_else:V_VLS
> + (match_operand:<VM> 3 "register_operand")
> + (match_operand:V_VLS 1 "nonmemory_operand")
> + (match_operand:V_VLS 2 "vector_register_or_const_0_operand")))]
> + "TARGET_VECTOR"
Would it hurt to allow any nonmemory operand here and just force the
"unsupported" constants into a register?
> + {
> + if (satisfies_constraint_Wc0 (operands[2]))
> + {
> + rtx reg = gen_reg_rtx (<MODE>mode);
> + emit_insn (gen_vec_duplicate_const_0<mode> (reg, operands[2]));
Can't we emit a move_insn directly without going through the new pattern?
Or will that be optimized away in between? And the new pattern isn't
actually a duplicate but a move anyway so maybe a force_reg (operands[2]) would
already do? Probably initial values other than 0 don't work out of the box?
In any case it wouldn't hurt to describe the "design decisions" (i.e. why
we need one thing and not another) so it's easier to follow the patterns
in the future.
Regards
Robin
