Hi!

On 2023-11-07T09:22:16+0100, Robin Dapp <rdapp....@gmail.com> wrote:
> similar to before this modifies a check so we do only match a
> vectorization attempt if it succeeded.  On riscv we potentially try
> several modes of which some may fail.
>
> I tested on riscv, aarch64 and x86 but on the cfarm machines
> there is no vect_fold_extract_last.  Maybe gcn would work?

With GCN (tested '-march=gfx906'), I actually see a "regression":

    PASS: gcc.dg/vect/vect-cond-reduc-4.c (test for excess errors)
    PASS: gcc.dg/vect/vect-cond-reduc-4.c execution test
    PASS: gcc.dg/vect/vect-cond-reduc-4.c scan-tree-dump-times vect "LOOP 
VECTORIZED" 2
    [-PASS:-]{+FAIL:+} gcc.dg/vect/vect-cond-reduc-4.c scan-tree-dump-times 
vect "optimizing condition reduction with 
[-FOLD_EXTRACT_LAST"-]{+FOLD_EXTRACT_LAST(?:(?!failed)(?!Re-trying).)*succeeded"+}
 2

That's "regression" in quotes as indeed there is no "succeeded":

    $ grep -C1 'optimizing condition reduction with FOLD_EXTRACT_LAST' -- 
vect-cond-reduc-4.c.176t.vect
    [...]/source-gcc/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c:19:21: note: 
  vect_is_simple_use: vectype vector(64) int
    [...]/source-gcc/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c:19:21: 
missed:   optimizing condition reduction with FOLD_EXTRACT_LAST.
    vect_model_reduction_cost: inside_cost = 0, prologue_cost = 0, 
epilogue_cost = 0 .
    --
    [...]/source-gcc/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c:19:21: note: 
  vect_is_simple_use: vectype vector(64) int
    [...]/source-gcc/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c:19:21: 
missed:   optimizing condition reduction with FOLD_EXTRACT_LAST.
    vect_model_reduction_cost: inside_cost = 0, prologue_cost = 0, 
epilogue_cost = 0 .


Grüße
 Thomas


> gcc/testsuite/ChangeLog:
>
>       * gcc.dg/vect/vect-cond-reduc-4.c: Make check more accurate.
> ---
>  gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c 
> b/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c
> index 8ea8c538713..c5aa989ec29 100644
> --- a/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c
> +++ b/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c
> @@ -42,7 +42,7 @@ main (void)
>  }
>
>  /* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" } } */
> -/* { dg-final { scan-tree-dump-times "optimizing condition reduction with 
> FOLD_EXTRACT_LAST" 2 "vect" { target { vect_fold_extract_last && 
> vect_pack_trunc } } } } */
> +/* { dg-final { scan-tree-dump-times "optimizing condition reduction with 
> FOLD_EXTRACT_LAST(?:(?!failed)(?!Re-trying).)*succeeded" 2 "vect" { target { 
> vect_fold_extract_last && vect_pack_trunc } } } } */
>  /* { dg-final { scan-tree-dump-times "optimizing condition reduction with 
> FOLD_EXTRACT_LAST" 4 "vect" { target { { vect_fold_extract_last } && { ! 
> vect_pack_trunc } } } } } */
>  /* { dg-final { scan-tree-dump-times "condition expression based on integer 
> induction." 2 "vect" { target { ! vect_fold_extract_last } } } } */
>
> --
> 2.41.0
-----------------
Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 
München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas 
Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht 
München, HRB 106955

Reply via email to