Hi Dimitar,
Thanks for the tests.
This patch set breaks the build for at least three embedded targets. See
below.
For avr the GCC build fails with:
/mnt/nvme/dinux/local-workspace/gcc/gcc/ira-lives.cc:149:39: error: call of overloaded
‘set_subreg_conflict_hard_regs(ira_allocno*&, int&)’ is ambiguous
149 | set_subreg_conflict_hard_regs (OBJECT_ALLOCNO (obj), regno);
I think it's because `HARD_REG_SET` and `unsigned int` are of the same
type on avr target(i.e. No more than 32 registers on avr target), so
these two bellow function prototypes conflict, I'll adjust it.
static void
set_subreg_conflict_hard_regs (ira_allocno_t a, HARD_REG_SET regs)
static void
set_subreg_conflict_hard_regs (ira_allocno_t a, unsigned int regno)
For arm-none-eabi the newlib build fails with:
/mnt/nvme/dinux/local-workspace/newlib/newlib/libm/math/e_jn.c:279:1: internal
compiler error: Floating point exception
279 | }
| ^
0x1176e0f crash_signal
/mnt/nvme/dinux/local-workspace/gcc/gcc/toplev.cc:316
0xf6008d get_range_hard_regs(int, subreg_range const&)
/mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:609
0xf6008d get_range_hard_regs(int, subreg_range const&)
/mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:601
0xf60312 new_insn_reg
/mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:658
0xf6064d add_regs_to_insn_regno_info
/mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1623
0xf62909 lra_update_insn_regno_info(rtx_insn*)
/mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1769
0xf62e46 lra_update_insn_regno_info(rtx_insn*)
/mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1762
0xf62e46 lra_push_insn_1
/mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1919
0xf62f2d lra_push_insn(rtx_insn*)
/mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1927
0xf62f2d push_insns
/mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1970
0xf63302 push_insns
/mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:1966
0xf63302 lra(_IO_FILE*)
/mnt/nvme/dinux/local-workspace/gcc/gcc/lra.cc:2511
0xf0e399 do_reload
/mnt/nvme/dinux/local-workspace/gcc/gcc/ira.cc:5960
0xf0e399 execute
/mnt/nvme/dinux/local-workspace/gcc/gcc/ira.cc:6148
The divide by zero error above is interesting. I'm not sure why
ira_reg_class_max_nregs[] yields 0 for the pseudo register 168 in the following
rtx:
(debug_insn 168 167 169 19 (var_location:SI encoding (reg/v:SI 168 [ encoding
])) -1
(nil))
I just cross compiled an arm-none-eabi compiler and didn't encounter
this error, can you give me a little more config info about build? For
example, flags_for_target, etc. Thanks again.
--
Best,
Lehua (RiVAI)
lehua.d...@rivai.ai
