Yes, I test the patch with all below configurations and there is no failure
now. That would be great!
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m1
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m1/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m1
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m1/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m1
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m1/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8/--param=riscv-autovec-preference=fixed-vlmax
Pan
-----Original Message-----
From: Robin Dapp <rdapp....@gmail.com>
Sent: Monday, December 11, 2023 9:15 PM
To: Li, Pan2 <pan2...@intel.com>; 钟居哲 <juzhe.zh...@rivai.ai>; gcc-patches
<gcc-patches@gcc.gnu.org>; palmer <pal...@dabbelt.com>; kito.cheng
<kito.ch...@gmail.com>; Jeff Law <jeffreya...@gmail.com>
Cc: rdapp....@gmail.com
Subject: Re: [PATCH] RISC-V: Add vectorized strcmp.
Hi Pan,
> I reduced the SZ size from 10 to 1, and the below case with SZ = 2
> will fail. The failed location is "foo is 50, foo2 is 12800, i,j is
> 1, 0".
>
> #define SZ 2
>
> const char *s[SZ] = {"1",
> "12345678901234567889012345678901234567890"};
Thanks. I still cannot reproduce but I think the reason is that
foo2 (so the reference) does something different with newlib as
opposed to libc.
Could you try if the attached helps for you?
Regards
Robin
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/builtin/strcmp-run.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/builtin/strcmp-run.c
index 6dec7da91c1..adbe022e0ee 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/builtin/strcmp-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/builtin/strcmp-run.c
@@ -1,8 +1,6 @@
/* { dg-do run } */
/* { dg-additional-options "-O3 -minline-strcmp" } */
-#include <string.h>
-
int
__attribute__ ((noipa))
foo (const char *s, const char *t)
@@ -10,23 +8,26 @@ foo (const char *s, const char *t)
return __builtin_strcmp (s, t);
}
-int
-__attribute__ ((noipa, optimize ("0")))
-foo2 (const char *s, const char *t)
-{
- return strcmp (s, t);
-}
-
#define SZ 10
-int main ()
+int
+main ()
{
const char *s[SZ]
= {"", "asdf", "0", "\0", "!@#$%***m1123fdnmoi43",
"a", "z", "1", "9", "12345678901234567889012345678901234567890"};
+ const int ref[SZ * SZ]
+ = {0, -97, -48, 0, -33, -97, -122, -49, -57, -49, 97, 0, 49,
97, 64,
+ 115, -25, 48, 40, 48, 48, -49, 0, 48, 15, -49, -74, -1, -9, -1,
+ 0, -97, -48, 0, -33, -97, -122, -49, -57, -49, 33, -64, -15, 33, 0,
+ -64, -89, -16, -24, -16, 97, -115, 49, 97, 64, 0, -25, 48, 40, 48,
+ 122, 25, 74, 122, 89, 25, 0, 73, 65, 73, 49, -48, 1,
49, 16,
+ -48, -73, 0, -8, -50, 57, -40, 9, 57, 24, -40, -65, 8, 0, 8,
+ 49, -48, 1, 49, 16, -48, -73, 50, -8, 0};
+
for (int i = 0; i < SZ; i++)
for (int j = 0; j < SZ; j++)
- if (foo (s[i], s[j]) != foo2 (s[i], s[j]))
+ if (foo (s[i], s[j]) != ref [i * SZ + j])
__builtin_abort ();
}
