Thanks all for comments, will have a try for riscv_v and send V2 if everything goes well.
Pan From: 钟居哲 <juzhe.zh...@rivai.ai> Sent: Friday, December 22, 2023 6:44 AM To: Jeff Law <jeffreya...@gmail.com>; Li, Pan2 <pan2...@intel.com>; gcc-patches <gcc-patches@gcc.gnu.org> Cc: Wang, Yanzhang <yanzhang.w...@intel.com>; kito.cheng <kito.ch...@gmail.com>; richard.guenther <richard.guent...@gmail.com>; Tamar Christina <tamar.christ...@arm.com> Subject: Re: Re: [PATCH v1] RISC-V: XFail the signbit-5 run test for RVV Maybe use riscv_v ? ________________________________ juzhe.zh...@rivai.ai<mailto:juzhe.zh...@rivai.ai> From: Jeff Law<mailto:jeffreya...@gmail.com> Date: 2023-12-22 03:16 To: pan2.li<mailto:pan2...@intel.com>; gcc-patches<mailto:gcc-patches@gcc.gnu.org> CC: juzhe.zhong<mailto:juzhe.zh...@rivai.ai>; yanzhang.wang<mailto:yanzhang.w...@intel.com>; kito.cheng<mailto:kito.ch...@gmail.com>; richard.guenther<mailto:richard.guent...@gmail.com>; tamar.christina<mailto:tamar.christ...@arm.com> Subject: Re: [PATCH v1] RISC-V: XFail the signbit-5 run test for RVV On 12/20/23 19:25, pan2...@intel.com<mailto:pan2...@intel.com> wrote: > From: Pan Li <pan2...@intel.com<mailto:pan2...@intel.com>> > > This patch would like to XFail the signbit-5 run test case for > the RVV. Given the case has one limitation like "This test does not > work when the truth type does not match vector type." in the beginning > of the test file. Aka, the RVV vector truth type is not integer type. > > The target board of riscv-sim like below will pick up `-march=rv64gcv` > when building the run test elf. Thus, the RVV cannot bypass this test > case like aarch64_sve with additional option `-march=armv8-a`. > > riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow > > For RVV, we leverage dg-xfail-run-if for this case like `amdgcn`. But isn't that just going to turn this into an XPASS when vector is not enabled? Looking at a recent rv64gc run of mine: > PASS: gcc.dg/signbit-5.c (test for excess errors) > PASS: gcc.dg/signbit-5.c execution test Ideally we'd find a way to handle with and without vector. jeff