Hi Jeff,

Perhaps fold_fault_load cannot be moved to riscv-protos.h since
gimple_folder is declared in riscv-vector-builtins.h. It's not reasonable
to include riscv-vector-builtins.h in riscv-protos.h. 

In fact, fold_fault_load is defined specially for some builtin functions, and
it would be better to just prototype in riscv-vector-builtins-bases.h.

Joshua






------------------------------------------------------------------
发件人:Jeff Law <jeffreya...@gmail.com>
发送时间:2023年12月21日(星期四) 02:14
收件人:"Jun Sha (Joshua)"<cooper.jos...@linux.alibaba.com>; 
"gcc-patches"<gcc-patches@gcc.gnu.org>
抄 送:"jim.wilson.gcc"<jim.wilson....@gmail.com>; palmer<pal...@dabbelt.com>; 
andrew<and...@sifive.com>; "philipp.tomsich"<philipp.toms...@vrull.eu>; 
"christoph.muellner"<christoph.muell...@vrull.eu>; 
"juzhe.zhong"<juzhe.zh...@rivai.ai>; Jin Ma<ji...@linux.alibaba.com>; Xianmiao 
Qu<cooper...@linux.alibaba.com>
主 题:Re: [PATCH v3 1/6] RISC-V: Refactor riscv-vector-builtins-bases.cc




On 12/20/23 05:25, Jun Sha (Joshua) wrote:
> This patch moves the definition of the enums lst_type and
> frm_op_type into riscv-vector-builtins-bases.h and removes
> the static visibility of fold_fault_load(), so these
> can be used in other compile units.
> 
> gcc/ChangeLog:
> 
>  * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type):
>  (enum frm_op_type): move to riscv-vector-builtins-bases.h
>  * config/riscv/riscv-vector-builtins-bases.h
>  (GCC_RISCV_VECTOR_BUILTINS_BASES_H): Add header files.
>  (enum lst_type): move from
>  (enum frm_op_type): riscv-vector-builtins-bases.cc
>  (fold_fault_load): riscv-vector-builtins-bases.cc
I'm largely hoping to leave the heavy review lifting here to Juzhe who 
knows GCC's RV vector bits as well as anyone.

Just one small issue.  Would it be better to prototype fold_fault_load 
elsewhere and avoid the gimple.h inclusion in 
riscv-vector-builtins-bases.h?  Perhaps riscv-protos.h?

You might consider prefixing the function name with riscv_.  It's not 
strictly necessary, but it appears to be relatively common in risc-v port.

Thanks,
Jeff

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