Hi Fei: > The fix is fine but maybe using s0 instead of t0 is better: > 1. simpler codes. > 2. less stack size > > current implementaion: > >+** sd\tt0,40\(sp\) > >+** frcsr\tt0 > >+** sw\tt0,32\(sp\) //save content of frcsr in stack > > use s0: > >+** sd\tt0,40\(sp\) > >+** frcsr\ts0 //save content of frcsr in s0 instead of > >stack. If s0 is used as callee saved register, it will be saved again later > >by legacy codes . > > Also adding this change in riscv_expand_prologue & epilogue would be > consistent with current stack allocation logic. > > I can try it if you think necessary.
Yeah, that can optimize further, but I guess the ideal strategy is check which register will save/restore at prologue/epilogue - and use that no matter if it's s* or t* register, anyway, I think it's interesting stuff to improve, so it would be appreciated if you can try :)
