Hi All,
The tests I recently added for early break fail in thumb mode
because in thumb mode `cbz/cbnz` exist and so the cmp+branch
is fused. This updates the testcases to accept either output.
Tested on arm-none-linux-gnueabihf with -mthumb/-marm.
Ok for master?
Thanks,
Tamar
gcc/testsuite/ChangeLog:
* gcc.target/arm/vect-early-break-cbranch.c: Accept thumb output.
--- inline copy of patch --
diff --git a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
index
f57bbd8be428d75dcf35aa194b5892fe04124cf6..d5c6d56ec869b8fa868acb78d4c3f40b2a241953
100644
--- a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
+++ b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
@@ -16,8 +16,12 @@ int b[N] = {0};
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vmov r[0-9]+, s[0-9]+ @ int
+** (
** cmp r[0-9]+, #0
** bne \.L[0-9]+
+** |
+** cbnz r[0-9]+, \.L.+
+** )
** ...
*/
void f1 ()
@@ -37,8 +41,12 @@ void f1 ()
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vmov r[0-9]+, s[0-9]+ @ int
+** (
** cmp r[0-9]+, #0
** bne \.L[0-9]+
+** |
+** cbnz r[0-9]+, \.L.+
+** )
** ...
*/
void f2 ()
@@ -58,8 +66,12 @@ void f2 ()
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vmov r[0-9]+, s[0-9]+ @ int
+** (
** cmp r[0-9]+, #0
** bne \.L[0-9]+
+** |
+** cbnz r[0-9]+, \.L.+
+** )
** ...
*/
void f3 ()
@@ -80,8 +92,12 @@ void f3 ()
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vmov r[0-9]+, s[0-9]+ @ int
+** (
** cmp r[0-9]+, #0
** bne \.L[0-9]+
+** |
+** cbnz r[0-9]+, \.L.+
+** )
** ...
*/
void f4 ()
@@ -101,8 +117,12 @@ void f4 ()
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vmov r[0-9]+, s[0-9]+ @ int
+** (
** cmp r[0-9]+, #0
** bne \.L[0-9]+
+** |
+** cbnz r[0-9]+, \.L.+
+** )
** ...
*/
void f5 ()
@@ -122,8 +142,12 @@ void f5 ()
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vmov r[0-9]+, s[0-9]+ @ int
+** (
** cmp r[0-9]+, #0
** bne \.L[0-9]+
+** |
+** cbnz r[0-9]+, \.L.+
+** )
** ...
*/
void f6 ()
--
diff --git a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
index
f57bbd8be428d75dcf35aa194b5892fe04124cf6..d5c6d56ec869b8fa868acb78d4c3f40b2a241953
100644
--- a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
+++ b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
@@ -16,8 +16,12 @@ int b[N] = {0};
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vmov r[0-9]+, s[0-9]+ @ int
+** (
** cmp r[0-9]+, #0
** bne \.L[0-9]+
+** |
+** cbnz r[0-9]+, \.L.+
+** )
** ...
*/
void f1 ()
@@ -37,8 +41,12 @@ void f1 ()
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vmov r[0-9]+, s[0-9]+ @ int
+** (
** cmp r[0-9]+, #0
** bne \.L[0-9]+
+** |
+** cbnz r[0-9]+, \.L.+
+** )
** ...
*/
void f2 ()
@@ -58,8 +66,12 @@ void f2 ()
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vmov r[0-9]+, s[0-9]+ @ int
+** (
** cmp r[0-9]+, #0
** bne \.L[0-9]+
+** |
+** cbnz r[0-9]+, \.L.+
+** )
** ...
*/
void f3 ()
@@ -80,8 +92,12 @@ void f3 ()
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vmov r[0-9]+, s[0-9]+ @ int
+** (
** cmp r[0-9]+, #0
** bne \.L[0-9]+
+** |
+** cbnz r[0-9]+, \.L.+
+** )
** ...
*/
void f4 ()
@@ -101,8 +117,12 @@ void f4 ()
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vmov r[0-9]+, s[0-9]+ @ int
+** (
** cmp r[0-9]+, #0
** bne \.L[0-9]+
+** |
+** cbnz r[0-9]+, \.L.+
+** )
** ...
*/
void f5 ()
@@ -122,8 +142,12 @@ void f5 ()
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vpmax.u32 d[0-9]+, d[0-9]+, d[0-9]+
** vmov r[0-9]+, s[0-9]+ @ int
+** (
** cmp r[0-9]+, #0
** bne \.L[0-9]+
+** |
+** cbnz r[0-9]+, \.L.+
+** )
** ...
*/
void f6 ()
