Thanks Kito, will add assertion here, and commit it if there is no surprise in riscv regression test.
Pan -----Original Message----- From: Kito Cheng <kito.ch...@gmail.com> Sent: Tuesday, January 30, 2024 8:54 PM To: Li, Pan2 <pan2...@intel.com> Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang <yanzhang.w...@intel.com> Subject: Re: [PATCH v2] RISC-V: Bugfix for vls mode aggregated in GPR calling convention Thanks for fixing this bug! LGTM with one minor comment :) > diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc > index 7b6111aa545..1de69019cd4 100644 > --- a/gcc/config/riscv/riscv.cc > +++ b/gcc/config/riscv/riscv.cc > @@ -1382,6 +1382,38 @@ riscv_v_ext_mode_p (machine_mode mode) > || riscv_v_ext_vls_mode_p (mode); > } > > +static unsigned > +riscv_v_vls_mode_aggregate_gpr_count (unsigned vls_unit_size, > + unsigned scalar_unit_size) > +{ > + gcc_assert (vls_unit_size != 0 && scalar_unit_size != 0); > + > + if (vls_unit_size < scalar_unit_size) > + return 1; > + Add gcc_assert ((vls_unit_size % scalar_unit_size) == 0); here to make sure no accident :P > + return vls_unit_size / scalar_unit_size; > +} > +