Re: [PATCH] RISC-V: Expand VLMAX scalar move in reduction

[Jeff Law]

On 2/4/24 23:37, juzhe.zh...@rivai.ai wrote:
I think it just trigger a latent bug that we didn't encounter.

Hi, Robin. Would you mind give me preprocessed file to reproduce the issue ?

I suspect it triggers latent bug in VSETVL PASS.
I've got a few minutes this morning before meetings start.  I'm going to 
try and trigger this with LTO off, which would help dramatically with 
our ability to provide a testcase.

jeff