Like AArch64 and POWER, RISC-V does not support trap on zero divide. gcc/testsuite/ * gnat.dg/div_zero.adb: Skip on RISC-V. --- gcc/testsuite/gnat.dg/div_zero.adb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/gnat.dg/div_zero.adb b/gcc/testsuite/gnat.dg/div_zero.adb index dedf3928db7..fb1c98caeff 100644 --- a/gcc/testsuite/gnat.dg/div_zero.adb +++ b/gcc/testsuite/gnat.dg/div_zero.adb @@ -1,5 +1,5 @@ -- { dg-do run } --- { dg-skip-if "divide does not trap" { aarch64*-*-* powerpc*-*-* } } +-- { dg-skip-if "divide does not trap" { aarch64*-*-* powerpc*-*-* riscv*-*-* } } -- This test requires architecture- and OS-specific support code for unwinding -- through signal frames (typically located in *-unwind.h) to pass. Feel free -- 2.43.1 -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different."