On Mon, Feb 26, 2024 at 09:00:58AM +0100, Richard Biener wrote:
> > > @@ -6756,7 +6756,8 @@ vectorizable_operation (vec_info *vinfo,
> > >    those through even when the mode isn't word_mode.  For
> > >    ops we have to lower the lowering code assumes we are
> > >    dealing with word_mode.  */
> > > -      if ((((code == PLUS_EXPR || code == MINUS_EXPR || code == 
> > > NEGATE_EXPR)
> > > +      if (!INTEGRAL_TYPE_P (TREE_TYPE (vectype))
> > > +   || (((code == PLUS_EXPR || code == MINUS_EXPR || code == NEGATE_EXPR)
> > >       || !target_support_p)
> > >      && maybe_ne (GET_MODE_SIZE (vec_mode), UNITS_PER_WORD))
> > >     /* Check only during analysis.  */
> 
> I think it will work fine.  Even after the last TLC this feels like in
> the need of more TLC ;)

Note, at least in theory, floating point NEGATE_EXPR could be handled just
fine in the emulated vectors, just xor the sign bit, and
BIT_{AND,IOR,XOR}_EXPR also would work but likely aren't valid IL on
floating point modes (though e.g. in RTL they are used even for them),
it is mainly PLUS_EXPR/MINUS_EXPR.  Perhaps the NEGATE_EXPR isn't worth
it though.  In any case, that wouldn't be stage4 material.

        Jakub

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