On 27/02/2024 13:56, Andre Vieira wrote: > > This patch annotates some MVE across lane instructions with a new attribute. > We use this attribute to let the compiler know that these instructions can be > safely implicitly predicated when tail predicating if their operands are > guaranteed to have zeroed tail predicated lanes. These instructions were > selected because having the value 0 in those lanes or 'tail-predicating' those > lanes have the same effect. > > gcc/ChangeLog: > > * config/arm/arm.md (mve_safe_imp_xlane_pred): New attribute. > * config/arm/iterators.md (mve_vmaxmin_safe_imp): New iterator > attribute. > * config/arm/mve.md (vaddvq_s, vaddvq_u, vaddlvq_s, vaddlvq_u, > vaddvaq_s, vaddvaq_u, vmaxavq_s, vmaxvq_u, vmladavq_s, vmladavq_u, > vmladavxq_s, vmlsdavq_s, vmlsdavxq_s, vaddlvaq_s, vaddlvaq_u, > vmlaldavq_u, vmlaldavq_s, vmlaldavq_u, vmlaldavxq_s, vmlsldavq_s, > vmlsldavxq_s, vrmlaldavhq_u, vrmlaldavhq_s, vrmlaldavhxq_s, > vrmlsldavhq_s, vrmlsldavhxq_s, vrmlaldavhaq_s, vrmlaldavhaq_u, > vrmlaldavhaxq_s, vrmlsldavhaq_s, vrmlsldavhaxq_s, vabavq_s, vabavq_u, > vmladavaq_u, vmladavaq_s, vmladavaxq_s, vmlsdavaq_s, vmlsdavaxq_s, > vmlaldavaq_s, vmlaldavaq_u, vmlaldavaxq_s, vmlsldavaq_s, > vmlsldavaxq_s): Added mve_safe_imp_xlane_pred. > --- > gcc/config/arm/arm.md | 6 ++++++ > gcc/config/arm/iterators.md | 8 ++++++++ > gcc/config/arm/mve.md | 12 ++++++++++++ > 3 files changed, 26 insertions(+) >
OK R.
