Richard Sandiford <richard.sandif...@arm.com> writes: > Wilco Dijkstra <wilco.dijks...@arm.com> writes: >> Use LDP/STP for large struct types as they have useful immediate offsets and >> are typically faster. >> This removes differences between little and big endian and allows use of >> LDP/STP without UNSPEC. >> >> Passes regress and bootstrap, OK for commit? >> >> gcc: >> * config/aarch64/aarch64.cc (aarch64_classify_address): Treat SIMD >> structs identically >> in little and bigendian. >> * config/aarch64/aarch64.md (aarch64_mov<mode>): Remove VSTRUCT >> instructions. >> (aarch64_be_mov<mode>): Allow little-endian, rename to >> aarch64_mov<mode>. >> (aarch64_be_movoi): Allow little-endian, rename to aarch64_movoi. >> (aarch64_be_movci): Allow little-endian, rename to aarch64_movci. >> (aarch64_be_movxi): Allow little-endian, rename to aarch64_movxi. >> Remove big-endian special case in define_split variants. >> >> gcc/testsuite: >> * gcc.target/aarch64/torture/simd-abi-8.c: Update to check for >> LDP/STP. > > [...] > So another alternative would be to go with the patch as-is, > but add a new mechanism for gimple to query the valid addresses > for IFN_(MASK_)LOAD_LANES and IFN_(MASK_)STORE_LANES, rather than > relying purely on the legitimate address mechanism,. Ideally, the new > interface would be generic enough that we could use it for target (md) > builtins as well, to better optimise ACLE code.
Gah, just realised after sending that there's another potential problem. Currently inline asms can assume that "m" will only include the LD1/ST1 range for little-endian. We might need to consider using TARGET_MEM_CONSTRAINT, so that we continue to present the same interface to asms, but can use the wider range internally. Thanks, Richard
