On 29/05/2024 13:15, Tobias Burnus wrote:
This patch depends (on the libgomp/target.c parts) of the patch
"[patch] libgomp: Enable USM for some nvptx devices",
https://gcc.gnu.org/pipermail/gcc-patches/2024-May/652987.html
AMD GPUs that are either APU devices or MI200 [or MI300X]
(with HSA_XNACK=1 set) can access host memory; the run-time library
returns in that case HSA_AMD_SYSTEM_INFO_SVM_ACCESSIBLE_BY_DEFAULT = true.
Thus, it makes sense to enable USM support for those devices, which
this patch does. — A simple test with all unified_shared_memory tests
shipping with sollve_vv now works:*
Test passed on the device.
as tested on an MI200 series device. In line with (some) other compilers,
it requires that HSA_XNACK=1 is set, otherwise the code will be executed
on the host.
(* Well, for C++, -O2 -fno-exception was used but stillonly 5 test case PASS, 1 delete[] etc. link error 1 ICE (segfault during
IPA pass: cpin gcn gcc) 1 runtime fail for
tests/5.2/unified_shared_mem/test_target_struct_obj_access.cpp [**] but
all 15 Fortran and 16 C tests PASS.)
Comments, remarks, suggestions?
Any reason not to commit it to mainline?
index f9b5d9daf85..3c7be95d7fd 100644
--- a/include/hsa.h
+++ b/include/hsa.h
@@ -466,7 +466,9 @@ typedef enum {
/**
* String containing the ROCr build identifier.
*/
- HSA_AMD_SYSTEM_INFO_BUILD_VERSION = 0x200
+ HSA_AMD_SYSTEM_INFO_BUILD_VERSION = 0x200,
+
+ HSA_AMD_SYSTEM_INFO_SVM_ACCESSIBLE_BY_DEFAULT = 0x202
} hsa_system_info_t;
/**
Please don't edit imported files.
Andrew
