This implements a V2SF -> V2DF extend.

gcc/ChangeLog:

        * config/s390/vector.md (*vmrhf<mode>): New.
        (extendv2sfv2df2): New.

gcc/testsuite/ChangeLog:

        * gcc.target/s390/vector/vec-extend-3.c: New test.
---
 Bootstrap and regtested on s390.  Ok for mainline?

 gcc/config/s390/vector.md                     | 28 +++++++++++++++++++
 .../gcc.target/s390/vector/vec-extend-3.c     | 18 ++++++++++++
 2 files changed, 46 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/s390/vector/vec-extend-3.c

diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index a931a4b1b17..d8657fae56d 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -895,6 +895,17 @@
   "vmrhf\t%0,%1,%2";
   [(set_attr "op_type" "VRR")])
 
+(define_insn "*vmrhf<mode>"
+  [(set (match_operand:V_HW_4                                0 
"register_operand" "=v")
+       (vec_select:V_HW_4
+        (vec_concat:V_HW_4 (match_operand:<vec_halfnumelts> 1 
"register_operand"  "v")
+                           (match_operand:<vec_halfnumelts> 2 
"register_operand"  "v"))
+        (parallel [(const_int 0) (const_int 2)
+                   (const_int 1) (const_int 3)])))]
+  "TARGET_VX"
+  "vmrhf\t%0,%1,%2";
+  [(set_attr "op_type" "VRR")])
+
 (define_insn "*vmrlf"
   [(set (match_operand:V_HW_4                              0 
"register_operand" "=v")
         (vec_select:V_HW_4
@@ -2394,6 +2405,23 @@
   "vup<zero_extend>h<bhfgq>\t%0,%1"
   [(set_attr "op_type" "VRR")])
 
+(define_expand "extendv2sfv2df2"
+  [(set (match_dup 2)
+       (vec_select:V4SF
+        (vec_concat:V4SF (match_operand:V2SF 1 "register_operand")
+                         (match_dup 1))
+        (parallel [(const_int 0) (const_int 2)
+                   (const_int 1) (const_int 3)])))
+   (set (match_operand:V2DF 0 "register_operand")
+       (float_extend:V2DF
+        (vec_select:V2SF
+         (match_dup 2)
+         (parallel [(const_int 0) (const_int 2)]))))]
+  "TARGET_VX"
+{
+  operands[2] = gen_reg_rtx (V4SFmode);
+})
+
 ;; vector unpack v16qi
 
 ; signed
diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-extend-3.c 
b/gcc/testsuite/gcc.target/s390/vector/vec-extend-3.c
new file mode 100644
index 00000000000..2b02e7bf9f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/vector/vec-extend-3.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=z13 -mzarch" } */
+/* { dg-final { check-function-bodies "**" "" "" } } */
+
+typedef float v2sf __attribute__ ((vector_size (8)));
+typedef double v2df __attribute__ ((vector_size (16)));
+
+/*
+** extendv2sfv2df2:
+**     vmrhf   %v24,%v24,%v24
+**     vldeb   %v24,%v24
+**     br      %r14
+*/
+
+v2df extendv2sfv2df2 (v2sf x)
+{
+  return __builtin_convertvector (x, v2df);
+}
-- 
2.45.1

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