Hi Kewen,
v2 with test case - I hope I worked all your nits in:
Glibc uses .machine to determine assembler optimizations to use.
However, since reworking the rs6000 .machine output selection in
commit e154242724b084380e3221df7c08fcdbd8460674 22 May 2019, G5 as
well as Cell, and even power4 w/ -maltivec currently resulted in
power7. Mask _ALTIVEC away as the .machine selection already did for
GFX and GPOPT.
powerpc64-t2-linux-gnu-gcc test.c -S -o - -mcpu=G5
.file "test.c"
.machine power7
.abiversion 2
.section ".text"
.ident "GCC: (GNU) 10.2.0"
.section .note.GNU-stack,"",@progbits
We ship this in T2/Linux [2] since 2020 and it is tested on G5, Cell
and Power8.
Signed-of-by: René Rebe <r...@exactcode.de>
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97367
[2] https://t2sde.org
--- a/gcc/config/rs6000/rs6000.cc.vanilla 2021-04-25 22:57:16.964223106
+0200
+++ b/gcc/config/rs6000/rs6000.cc 2024-06-10 18:20:27.193223841 +0200
@@ -5765,7 +5765,8 @@
HOST_WIDE_INT flags = rs6000_isa_flags;
/* Disable the flags that should never influence the .machine selection. */
- flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT |
OPTION_MASK_ISEL);
+ flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT |
OPTION_MASK_ALTIVEC
+ | OPTION_MASK_ISEL);
if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
return "power10";
--- a/gcc/testsuite/gcc.target/powerpc/pr97367.c.vanilla 2024-05-30
18:26:29.839784279 +0200
+++ b/gcc/testsuite/gcc.target/powerpc/pr97367.c 2024-10-06
18:20:34.873818482 +0200
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=G5" } */
+
+int dummy ()
+{
+ return 0;
+}
+
+/* { dg-final { scan-assembler "power4" } } */
--
René Rebe, ExactCODE GmbH, Lietzenburger Str. 42, DE-10789 Berlin
https://exactcode.com | https://t2sde.org | https://rene.rebe.de
