On Tue, Jul 23, 2024 at 5:52 PM Takayuki 'January June' Suwa <jjsuwa_sys3...@yahoo.co.jp> wrote: > > We would like to implement the following to store a single-precision FP > constant in a hardware FP register: > > - Load the bit-exact integer image of the pooled single-precision FP > constant into an address (integer) register > - Then, assign from that address register to a hardware single-precision > FP register > > .literal_position > .literal .LC1, 0x3f800000 > ... > l32r a9, .LC1 > wfr f0, a9 > > However, it was emitted as follows: > > - Load the address of the FP constant entry in litpool into an address > register > - Then, dereference the address via that address register into a hardware > single-precision FP register > > .literal_position > .literal .LC1, 0x3f800000 > .literal .LC2, .LC1 > ... > l32r a9, .LC2 > lsi f0, a9, 0 > > It is obviously inefficient to read the pool twice. > > gcc/ChangeLog: > > * config/xtensa/xtensa.md (movsf_internal): > Reorder alternative that corresponds to L32R machine instruction, > and prefix alternatives that correspond to LSI/SSI instructions > with the constraint character '^' so that they are disparaged by > reload/LRA.
Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master -- Thanks. -- Max
