On Tue, Jul 23, 2024 at 5:52 PM Takayuki 'January June' Suwa <jjsuwa_sys3...@yahoo.co.jp> wrote: > > According to the implemented pipeline model, this cost can be assumed to be > 1 clock cycle. > > gcc/ChangeLog: > > * config/xtensa/xtensa.cc (xtensa_insn_cost): > Add a case statement for TYPE_FARITH.
Regtested for target=xtensa-linux-uclibc, no new regressions. Committed to master -- Thanks. -- Max
