Hello,
The attached patch adds the 'nott' insn that is supported by SH2A.
While the 'nott' pattern itself is usually combined away entirely (CSiBE
shows no diffs for SH2A), on non-SH2A the new patterns seem to catch a
few border cases, where unnecessary movt sequences can be eliminated.
Tested against rev 189338 with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m2a-single/-mb,-m4/-ml,-m4/-mb,
-m4-single/-ml,-m4-single/-mb,-m4a-single/-ml,-m4a-single/-mb}"
and no new failures.
Cheers,
Oleg
ChangeLog:
* config/sh/sh.md (*branch_true_eq, *branch_false_ne, nott):
New insns.
Index: gcc/config/sh/sh.md
===================================================================
--- gcc/config/sh/sh.md (revision 189269)
+++ gcc/config/sh/sh.md (working copy)
@@ -7220,6 +7220,17 @@
}
[(set_attr "type" "cbranch")])
+(define_insn "*branch_true_eq"
+ [(set (pc) (if_then_else (eq (match_operand 1 "t_reg_operand" "")
+ (const_int 1))
+ (label_ref (match_operand 0 "" ""))
+ (pc)))]
+ "TARGET_SH1"
+{
+ return output_branch (1, insn, operands);
+}
+ [(set_attr "type" "cbranch")])
+
(define_insn "branch_false"
[(set (pc) (if_then_else (eq (match_operand 1 "t_reg_operand" "")
(const_int 0))
@@ -7231,6 +7242,17 @@
}
[(set_attr "type" "cbranch")])
+(define_insn "*branch_false_ne"
+ [(set (pc) (if_then_else (ne (match_operand 1 "t_reg_operand" "")
+ (const_int 1))
+ (label_ref (match_operand 0 "" ""))
+ (pc)))]
+ "TARGET_SH1"
+{
+ return output_branch (0, insn, operands);
+}
+ [(set_attr "type" "cbranch")])
+
;; Patterns to prevent reorg from re-combining a condbranch with a branch
;; which destination is too far away.
;; The const_int_operand is distinct for each branch target; it avoids
@@ -9844,6 +9866,20 @@
""
[(const_int 0)])
+(define_insn_and_split "nott"
+ [(set (reg:SI T_REG) (xor:SI (reg:SI T_REG) (const_int 1)))]
+ "TARGET_SH1"
+{
+ gcc_assert (TARGET_SH2A);
+ return "nott";
+}
+ "! TARGET_SH2A && can_create_pseudo_p ()"
+ [(set (match_dup 0) (reg:SI T_REG))
+ (set (reg:SI T_REG) (eq:SI (match_dup 0) (const_int 0)))]
+{
+ operands[0] = gen_reg_rtx (SImode);
+})
+
(define_expand "cstoresf4"
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operator:SI 1 "sh_float_comparison_operator"
