When configuring GCC for RV32EC with:
./configure \
--target=riscv32-none-elf \
--with-multilib-generator="rv32ec-ilp32e--" \
--with-abi=ilp32e \
--with-arch=rv32ec
Then the build fails because division is erroneously left enabled:
cc1: error: '-mdiv' requires '-march' to subsume the 'M' extension
-fself-test: 8412281 pass(es) in 0.647173 seconds
Fix by tying both MUL and DIV option masks to the "M" standard extension
for integer multiplication and division.
Tested the above RV32EC-only toolchain using the GNU simulator:
=== gcc Summary ===
# of expected passes 211621
# of unexpected failures 3018
# of expected failures 1061
# of unresolved testcases 5651
# of unsupported tests 18958
Ok for trunk?
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc: Tie both MUL and DIV to
the M extension.
Signed-off-by: Dimitar Dimitrov <[email protected]>
---
gcc/common/config/riscv/riscv-common.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index 60595a3e356..227bc3b89c0 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -1589,7 +1589,7 @@ struct riscv_ext_flag_table_t {
static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
{
RISCV_EXT_FLAG_ENTRY ("e", x_target_flags, MASK_RVE),
- RISCV_EXT_FLAG_ENTRY ("m", x_target_flags, MASK_MUL),
+ RISCV_EXT_FLAG_ENTRY ("m", x_target_flags, MASK_MUL | MASK_DIV),
RISCV_EXT_FLAG_ENTRY ("a", x_target_flags, MASK_ATOMIC),
RISCV_EXT_FLAG_ENTRY ("f", x_target_flags, MASK_HARD_FLOAT),
RISCV_EXT_FLAG_ENTRY ("d", x_target_flags, MASK_DOUBLE_FLOAT),
--
2.47.0