Hello,
The attached patch fixes PR 33135 as discussed in the PR.
Tested with
make info dvi pdf
and
make check-gcc RUNTESTFLAGS="sh.exp=pr33135* --target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2e,-m3,-m3e,-m2a/-mb,-m2a-single/-mb,-m4/-ml,
-m4/-mb,-m4-single/-ml,-m4-single/-mb,-m4a-single/-ml,-m4a-single/-mb}"
OK?
Cheers,
Oleg
ChangeLog:
PR target/33135
* config/sh/sh.opt (mieee): Use Var instead of Mask. Correct
description.
* config/sh/sh.c (sh_option_override): Do not change
flag_finite_math_only. Set TARGET_IEEE to complement of
flag_finite_math_only.
* doc/invoke.texi (SH options): Add mno-ieee. Correct
description of mieee and mno-ieee behavior.
testsuite/ChangeLog:
PR target/33135
* gcc.target/sh/pr33135-1.c: New.
* gcc.target/sh/pr33135-2.c: New.
* gcc.target/sh/pr33135-3.c: New.
* gcc.target/sh/pr33135-4.c: New.
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi (revision 189549)
+++ gcc/doc/invoke.texi (working copy)
@@ -881,8 +881,8 @@
-m5-compact -m5-compact-nofpu @gol
-mb -ml -mdalign -mrelax @gol
-mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol
--mieee -mbitops -misize -minline-ic_invalidate -mpadstruct -mspace @gol
--mprefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol
+-mieee -mno-ieee -mbitops -misize -minline-ic_invalidate -mpadstruct @gol
+-mspace -mprefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol
-mdivsi3_libfunc=@var{name} -mfixed-range=@var{register-range} @gol
-mindexed-addressing -mgettrcost=@var{number} -mpt-fixed @gol
-maccumulate-outgoing-args -minvalid-symbols -msoft-atomic -mhard-atomic @gol
@@ -18099,13 +18099,15 @@
@option{-mhitachi} is given.
@item -mieee
+@item -mno-ieee
@opindex mieee
-Increase IEEE compliance of floating-point code.
-At the moment, this is equivalent to @option{-fno-finite-math-only}.
-When generating 16-bit SH opcodes, getting IEEE-conforming results for
-comparisons of NANs / infinities incurs extra overhead in every
-floating-point comparison, therefore the default is set to
-@option{-ffinite-math-only}.
+@opindex mnoieee
+Control the IEEE compliance of floating-point comparisons, which affects the
+handling of cases where the result of a comparison is unordered. By default
+@option{-mieee} is implicitly enabled. If @option{-ffinite-math-only} is
+enabled @option{-mno-ieee} is implicitly set, which results in faster
+floating-point greater-equal and less-equal comparisons. The implcit settings
+can be overridden by specifying either @option{-mieee} or @option{-mno-ieee}.
@item -minline-ic_invalidate
@opindex minline-ic_invalidate
Index: gcc/testsuite/gcc.target/sh/pr33135-2.c
===================================================================
--- gcc/testsuite/gcc.target/sh/pr33135-2.c (revision 0)
+++ gcc/testsuite/gcc.target/sh/pr33135-2.c (revision 0)
@@ -0,0 +1,32 @@
+/* Check that only the fcmp/gt instruction is generated when specifying
+ -ffinite-math-only (implicit -mno-ieee). */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1 -ffinite-math-only" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } } */
+/* { dg-final { scan-assembler-not "fcmp/eq" } } */
+/* { dg-final { scan-assembler-times "fcmp/gt" 4 } } */
+
+int
+test_00 (float a, float b)
+{
+ return a <= b;
+}
+
+int
+test_01 (float a, float b)
+{
+ return a >= b;
+}
+
+int
+test_02 (double a, double b)
+{
+ return a <= b;
+}
+
+int
+test_03 (double a, double b)
+{
+ return a >= b;
+}
+
Index: gcc/testsuite/gcc.target/sh/pr33135-4.c
===================================================================
--- gcc/testsuite/gcc.target/sh/pr33135-4.c (revision 0)
+++ gcc/testsuite/gcc.target/sh/pr33135-4.c (revision 0)
@@ -0,0 +1,32 @@
+/* Check that only the fcmp/gt instruction is generated when specifying
+ -fno-finite-math-only and -mno-ieee. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1 -fno-finite-math-only -mno-ieee" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } } */
+/* { dg-final { scan-assembler-not "fcmp/eq" } } */
+/* { dg-final { scan-assembler-times "fcmp/gt" 4 } } */
+
+int
+test_00 (float a, float b)
+{
+ return a <= b;
+}
+
+int
+test_01 (float a, float b)
+{
+ return a >= b;
+}
+
+int
+test_02 (double a, double b)
+{
+ return a <= b;
+}
+
+int
+test_03 (double a, double b)
+{
+ return a >= b;
+}
+
Index: gcc/testsuite/gcc.target/sh/pr33135-1.c
===================================================================
--- gcc/testsuite/gcc.target/sh/pr33135-1.c (revision 0)
+++ gcc/testsuite/gcc.target/sh/pr33135-1.c (revision 0)
@@ -0,0 +1,32 @@
+/* Check that fcmp/eq and fcmp/gt instructions are generated by default
+ (implicit -mieee). */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } } */
+/* { dg-final { scan-assembler-times "fcmp/eq" 4 } } */
+/* { dg-final { scan-assembler-times "fcmp/gt" 4 } } */
+
+int
+test_00 (float a, float b)
+{
+ return a <= b;
+}
+
+int
+test_01 (float a, float b)
+{
+ return a >= b;
+}
+
+int
+test_02 (double a, double b)
+{
+ return a <= b;
+}
+
+int
+test_03 (double a, double b)
+{
+ return a >= b;
+}
+
Index: gcc/testsuite/gcc.target/sh/pr33135-3.c
===================================================================
--- gcc/testsuite/gcc.target/sh/pr33135-3.c (revision 0)
+++ gcc/testsuite/gcc.target/sh/pr33135-3.c (revision 0)
@@ -0,0 +1,32 @@
+/* Check that fcmp/eq and fcmp/gt instructions are generated when specifying
+ -ffinite-math-only and -mieee. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1 -ffinite-math-only -mieee" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } } */
+/* { dg-final { scan-assembler-times "fcmp/eq" 4 } } */
+/* { dg-final { scan-assembler-times "fcmp/gt" 4 } } */
+
+int
+test_00 (float a, float b)
+{
+ return a <= b;
+}
+
+int
+test_01 (float a, float b)
+{
+ return a >= b;
+}
+
+int
+test_02 (double a, double b)
+{
+ return a <= b;
+}
+
+int
+test_03 (double a, double b)
+{
+ return a >= b;
+}
+
Index: gcc/config/sh/sh.opt
===================================================================
--- gcc/config/sh/sh.opt (revision 189549)
+++ gcc/config/sh/sh.opt (working copy)
@@ -266,8 +266,8 @@
Follow Renesas (formerly Hitachi) / SuperH calling conventions
mieee
-Target Report Mask(IEEE)
-Increase the IEEE compliance for floating-point code
+Target Var(TARGET_IEEE)
+Increase the IEEE compliance for floating-point comparisons
mindexed-addressing
Target Report Mask(ALLOW_INDEXED_ADDRESS) Condition(SUPPORT_ANY_SH5_32MEDIA)
Index: gcc/config/sh/sh.c
===================================================================
--- gcc/config/sh/sh.c (revision 189551)
+++ gcc/config/sh/sh.c (working copy)
@@ -599,11 +599,6 @@
SUBTARGET_OVERRIDE_OPTIONS;
if (optimize > 1 && !optimize_size)
target_flags |= MASK_SAVE_ALL_TARGET_REGS;
- if (flag_finite_math_only == 2)
- flag_finite_math_only
- = !flag_signaling_nans && TARGET_SH2E && ! TARGET_IEEE;
- if (TARGET_SH2E && !flag_finite_math_only)
- target_flags |= MASK_IEEE;
sh_cpu = PROCESSOR_SH1;
assembler_dialect = 0;
if (TARGET_SH2)
@@ -889,6 +884,11 @@
&& flag_unsafe_math_optimizations
&& flag_finite_math_only;
+ /* If the -mieee option was not explicitly set by the user, turn it on
+ unless -ffinite-math-only was specified. See also PR 33135. */
+ if (! global_options_set.x_TARGET_IEEE)
+ TARGET_IEEE = ! flag_finite_math_only;
+
if (sh_fixed_range_str)
sh_fix_range (sh_fixed_range_str);
