Add a new field to tune_params structure to indicate whether LDRD/STRD
instructions are preferred over POP/PUSH/STM/LDM. Set the new field to false
for all existing tunes. Subsequent patches will set it to true for
Cortex-A15 and use it to determine which instructions to emit, in particular
for prologue and epilogue.
Ok for trunk?
Thanks,
Greta
Changelog
gcc/
2012-07-20 Sameera Deshpande <sameera.deshpa...@arm.com>
Greta Yorsh <greta.yo...@arm.com>
* config/arm/arm-protos.h (prefer_ldrd_strd): New field.
* config/arm/arm.c (arm_slowmul_tune): Initialized the new field.
(arm_fastmul_tune, arm_strongarm_tune): Likewise.
(arm_xscale_tune, arm_9e_tune, arm_v6t2_tune): Likewise.
(rm_cortex_tune, am_cortex_a5_tune, arm_cortex_a9_tune): Likewise.
(arm_fa726te_tune): Likewise.diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index ba5802e..7cd6a7c 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -245,6 +245,8 @@ struct tune_params
int l1_cache_line_size;
bool prefer_constant_pool;
int (*branch_cost) (bool, bool);
+ /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM. */
+ bool prefer_ldrd_strd;
};
extern const struct tune_params *current_tune;
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index a385e30..3f13a3d 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -878,7 +878,8 @@ const struct tune_params arm_slowmul_tune =
5, /* Max cond insns. */
ARM_PREFETCH_NOT_BENEFICIAL,
true, /* Prefer constant
pool. */
- arm_default_branch_cost
+ arm_default_branch_cost,
+ false /* Prefer LDRD/STRD. */
};
const struct tune_params arm_fastmul_tune =
@@ -889,7 +890,8 @@ const struct tune_params arm_fastmul_tune =
5, /* Max cond insns. */
ARM_PREFETCH_NOT_BENEFICIAL,
true, /* Prefer constant
pool. */
- arm_default_branch_cost
+ arm_default_branch_cost,
+ false /* Prefer LDRD/STRD. */
};
/* StrongARM has early execution of branches, so a sequence that is worth
@@ -903,7 +905,8 @@ const struct tune_params arm_strongarm_tune =
3, /* Max cond insns. */
ARM_PREFETCH_NOT_BENEFICIAL,
true, /* Prefer constant
pool. */
- arm_default_branch_cost
+ arm_default_branch_cost,
+ false /* Prefer LDRD/STRD. */
};
const struct tune_params arm_xscale_tune =
@@ -914,7 +917,8 @@ const struct tune_params arm_xscale_tune =
3, /* Max cond insns. */
ARM_PREFETCH_NOT_BENEFICIAL,
true, /* Prefer constant
pool. */
- arm_default_branch_cost
+ arm_default_branch_cost,
+ false /* Prefer LDRD/STRD. */
};
const struct tune_params arm_9e_tune =
@@ -925,7 +929,8 @@ const struct tune_params arm_9e_tune =
5, /* Max cond insns. */
ARM_PREFETCH_NOT_BENEFICIAL,
true, /* Prefer constant
pool. */
- arm_default_branch_cost
+ arm_default_branch_cost,
+ false /* Prefer LDRD/STRD. */
};
const struct tune_params arm_v6t2_tune =
@@ -936,7 +941,8 @@ const struct tune_params arm_v6t2_tune =
5, /* Max cond insns. */
ARM_PREFETCH_NOT_BENEFICIAL,
false, /* Prefer constant pool. */
- arm_default_branch_cost
+ arm_default_branch_cost,
+ false /* Prefer LDRD/STRD. */
};
/* Generic Cortex tuning. Use more specific tunings if appropriate. */
@@ -948,7 +954,8 @@ const struct tune_params arm_cortex_tune =
5, /* Max cond insns. */
ARM_PREFETCH_NOT_BENEFICIAL,
false, /* Prefer constant pool. */
- arm_default_branch_cost
+ arm_default_branch_cost,
+ false /* Prefer LDRD/STRD. */
};
/* Branches can be dual-issued on Cortex-A5, so conditional execution is
@@ -962,7 +969,8 @@ const struct tune_params arm_cortex_a5_tune =
1, /* Max cond insns. */
ARM_PREFETCH_NOT_BENEFICIAL,
false, /* Prefer constant pool. */
- arm_cortex_a5_branch_cost
+ arm_cortex_a5_branch_cost,
+ false /* Prefer LDRD/STRD. */
};
const struct tune_params arm_cortex_a9_tune =
@@ -973,7 +981,8 @@ const struct tune_params arm_cortex_a9_tune =
5, /* Max cond insns. */
ARM_PREFETCH_BENEFICIAL(4,32,32),
false, /* Prefer constant pool. */
- arm_default_branch_cost
+ arm_default_branch_cost,
+ false /* Prefer LDRD/STRD. */
};
const struct tune_params arm_fa726te_tune =
@@ -984,7 +993,8 @@ const struct tune_params arm_fa726te_tune =
5, /* Max cond insns. */
ARM_PREFETCH_NOT_BENEFICIAL,
true, /* Prefer constant
pool. */
- arm_default_branch_cost
+ arm_default_branch_cost,
+ false /* Prefer LDRD/STRD. */
};
