On Mon, Jan 27, 2025 at 11:09:38AM +0100, Richard Biener wrote:
> PR rtl-optimization/118662
> * combine.cc (try_combine): When re-materializing a load
> from an extended reg by a lowpart subreg make sure we're
> dealing with single-component modes.
>
> * gcc.dg/torture/pr118662.c: New testcase.
> ---
> gcc/combine.cc | 5 +++++
> gcc/testsuite/gcc.dg/torture/pr118662.c | 18 ++++++++++++++++++
> 2 files changed, 23 insertions(+)
> create mode 100644 gcc/testsuite/gcc.dg/torture/pr118662.c
>
> diff --git a/gcc/combine.cc b/gcc/combine.cc
> index a2d4387cebe..4849603ba5e 100644
> --- a/gcc/combine.cc
> +++ b/gcc/combine.cc
> @@ -3904,6 +3904,9 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1,
> rtx_insn *i0,
> copy. This saves at least one insn, more if register allocation can
> eliminate the copy.
>
> + We cannot do this if the involved modes have more than one elements,
> + like for vector or complex modes.
> +
> We cannot do this if the destination of the first assignment is a
> condition code register. We eliminate this case by making sure
> the SET_DEST and SET_SRC have the same mode.
> @@ -3919,6 +3922,8 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1,
> rtx_insn *i0,
> && GET_CODE (SET_SRC (XVECEXP (newpat, 0, 0))) == SIGN_EXTEND
> && (GET_MODE (SET_DEST (XVECEXP (newpat, 0, 0)))
> == GET_MODE (SET_SRC (XVECEXP (newpat, 0, 0))))
> + && known_eq (GET_MODE_NUNITS
> + (GET_MODE (SET_DEST (XVECEXP (newpat, 0, 0)))), 1)
If you want to rule this out for vector/complex modes, then the above
doesn't do that, all the V1??mode will still be optimized, and I think
that is undesirable.
So, either && !VECTOR_MODE_P (GET_MODE (...))
&& !COMPLEX_MODE_P (GET_MODE (...))
or perhaps as less expensive but less readable check
&& GET_MODE_INNER (GET_MODE (...)) == GET_MODE (...)
with a comment.
Jakub
