Hi!
The gcc.dg/vect/pr113281-1.c test and many others ICE on riscv since
presumably the r15-9238 change which allowed more cases of vector modes
in simplify_const_relational_operation.
In the testcase it is EQ of
(popcount:SI (unspec:RVVMF32BI [
(and:RVVMF32BI (const_vector:RVVMF32BI repeat [
(const_int 1 [0x1])
])
(reg:RVVMF32BI 147 [ mask__6.8_35 ]))
(reg:SI 143 [ _41 ])
(const_int 0 [0])
(reg:SI 66 vl)
(reg:SI 67 vtype)
] UNSPEC_VPREDICATE))
and
(const_int 0 [0])
which it tries to fold as EQ comparison of
(unspec:RVVMF32BI [
(and:RVVMF32BI (const_vector:RVVMF32BI repeat [
(const_int 1 [0x1])
])
(reg:RVVMF32BI 147 [ mask__6.8_35 ]))
(reg:SI 143 [ _41 ])
(const_int 0 [0])
(reg:SI 66 vl)
(reg:SI 67 vtype)
] UNSPEC_VPREDICATE)
with
(const_int 0 [0])
which ICEs because const0_rtx isn't a vector.
Fixed by using CONST0_RTX, so that we pass
(const_vector:RVVMF32BI repeat [
(const_int 0 [0])
])
instead.
I'll bootstrap/regtest this on aarch64-linux but have no way
to test it for RISCV, will some CI take care of it or can somebody
please test it?
2025-04-08 Jakub Jelinek <[email protected]>
PR rtl-optimization/119672
* simplify-rtx.cc (simplify_context::simplify_relational_operation_1):
For POPCOUNT == 0 or != 0 optimizations use
CONST0_RTX (GET_MODE (XEXP (op0, 0))) rather than const0_rtx.
--- gcc/simplify-rtx.cc.jj 2025-04-07 11:54:49.216910340 +0200
+++ gcc/simplify-rtx.cc 2025-04-08 11:14:53.826293652 +0200
@@ -6465,14 +6465,16 @@ simplify_context::simplify_relational_op
case LEU:
/* (eq (popcount x) (const_int 0)) -> (eq x (const_int 0)). */
return simplify_gen_relational (EQ, mode, GET_MODE (XEXP (op0, 0)),
- XEXP (op0, 0), const0_rtx);
+ XEXP (op0, 0),
+ CONST0_RTX (GET_MODE (XEXP (op0, 0))));
case NE:
case GT:
case GTU:
/* (ne (popcount x) (const_int 0)) -> (ne x (const_int 0)). */
return simplify_gen_relational (NE, mode, GET_MODE (XEXP (op0, 0)),
- XEXP (op0, 0), const0_rtx);
+ XEXP (op0, 0),
+ CONST0_RTX (GET_MODE (XEXP (op0, 0))));
default:
break;
Jakub
