[PATCH] RISC-V: Use scratch reg for Rd , so that src/rs2 is not clobbered for Store-Conditional.

[Umesh Kalappa]

gcc/ChangeLog:

        * config/riscv/sync.md (lrsc_atomic_exchange<mode>):
        Use the scratch reg for rd.

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/zalrsc.c: New test.
---
 gcc/config/riscv/sync.md                | 11 +++++------
 gcc/testsuite/gcc.target/riscv/zalrsc.c | 13 +++++++++++++
 2 files changed, 18 insertions(+), 6 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/zalrsc.c

diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
index 726800a9662..a75ea6834e4 100644
--- a/gcc/config/riscv/sync.md
+++ b/gcc/config/riscv/sync.md
@@ -405,18 +405,17 @@
           (match_operand:SI 3 "const_int_operand")] ;; model
          UNSPEC_SYNC_EXCHANGE))
    (set (match_dup 1)
-       (match_operand:GPR 2 "register_operand" "0"))
+       (match_operand:GPR 2 "reg_or_0_operand" "rJ"))
    (clobber (match_scratch:GPR 4 "=&r"))]        ;; tmp_1
   "!TARGET_ZAAMO && TARGET_ZALRSC"
   {
     return "1:\;"
-          "lr.<amo>%I3\t%4, %1\;"
-          "sc.<amo>%J3\t%0, %0, %1\;"
-          "bnez\t%0, 1b\;"
-          "mv\t%0, %4";
+          "lr.<amo>%I3\t%0, %1\;"
+          "sc.<amo>%J3\t%4, %z2, %1\;"
+          "bnez\t%4, 1b\";
   }
   [(set_attr "type" "atomic")
-   (set (attr "length") (const_int 16))])
+   (set (attr "length") (const_int 12))])
 
 (define_expand "atomic_exchange<mode>"
   [(match_operand:SHORT 0 "register_operand") ;; old value at mem
diff --git a/gcc/testsuite/gcc.target/riscv/zalrsc.c 
b/gcc/testsuite/gcc.target/riscv/zalrsc.c
new file mode 100644
index 00000000000..b8991f13da8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zalrsc.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64imfd_zalrsc -mabi=lp64" } */
+/* { dg-skip-if "" { *-*-* } {"-O0"} } */
+
+/* lr.w/sc.w */
+int *i;
+int lr_sc(int v)
+{
+  return __atomic_exchange_4(i, v, __ATOMIC_RELAXED);
+}
+
+/* { dg-final { scan-assembler-times {\mlr.w} 1 } } */
+/* { dg-final { scan-assembler-times {\msc.w} 1 } } */

base-commit: e477e7cd104af96c55379f69125db3f1c350c9ed
-- 
2.43.0