Hi all,
I just found that since AMX-COMPLEX is enabled on Diamond Rapids but
not enabled on Granite Rapids, we should use the ISA level from
Granite Rapids D instead of Granite Rapids to show that.
Since Diamond Rapids is the actual successor of Granite Rapids but
not Granite Rapids D, I slightly tweak the word here just like what
we did in GCC13 for Sierra Forest.
Ok for gcc-wwwdocs?
Thx,
Haochen
---
htdocs/gcc-15/changes.html | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/htdocs/gcc-15/changes.html b/htdocs/gcc-15/changes.html
index 5d35253a..d0b289e1 100644
--- a/htdocs/gcc-15/changes.html
+++ b/htdocs/gcc-15/changes.html
@@ -1227,10 +1227,10 @@ structure used in <code>core 1.49</code>.
</li>
<li>GCC now supports the Intel CPU named Diamond Rapids through
<code>-march=diamondrapids</code>.
- Based on Granite Rapids, the switch further enables the AMX-AVX512,
- AMX-FP8, AMX-MOVRS, AMX-TF32, AMX-TRANSPOSE, APX_F, AVX10.2, AVX-IFMA,
- AVX-NE-CONVERT, AVX-VNNI-INT16, AVX-VNNI-INT8, CMPccXADD, MOVRS, SHA512,
- SM3, SM4, and USER_MSR ISA extensions.
+ Based on ISA extensions enabled on Granite Rapids D, the switch further
+ enables the AMX-AVX512, AMX-FP8, AMX-MOVRS, AMX-TF32, AMX-TRANSPOSE, APX_F,
+ AVX10.2, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT16, AVX-VNNI-INT8,
+ CMPccXADD, MOVRS, SHA512, SM3, SM4, and USER_MSR ISA extensions.
</li>
<li>Support for Xeon Phi CPUs (a.k.a. Knight Landing and Knight Mill) were
removed in GCC 15. GCC will no longer accept <code>-march=knl</code>,
--
2.31.1
