Applied to trunk, thanks! --Philipp.
On Tue, 29 Jul 2025 at 16:24, Jeff Law <jeffreya...@gmail.com> wrote: > > > > On 7/28/25 3:38 AM, Konstantinos Eleftheriou wrote: > > When having multiple stores with the same offset as the load, in the > > case that we are eliminating the load, we were generating a mov instruction > > for both of them, leading to the overwrite of the register containing the > > loaded value. > > > > This patch fixes this issue by generating a mov instruction only for the > > first store in the store-load sequence that has the same offset as the load. > > For the next ones that might be encountered, we use bit-field insertion. > > > > Bootstrapped/regtested on AArch64 and x86_64. > > > > PR rtl-optimization/120660 > > > > gcc/ChangeLog: > > > > * avoid-store-forwarding.cc (process_store_forwarding): > > Fix instruction generation when haveing multiple stores with > > base offset. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.dg/pr120660.c: New test. > OK > jeff >
