On Tue, Jul 29, 2025 at 6:58 AM Stefan Schulze Frielinghaus
<stefa...@linux.ibm.com> wrote:
>
> From: Stefan Schulze Frielinghaus <stefa...@gcc.gnu.org>
>
> Targets hppa, m68k, pdp11, rx, sh, vax do not default to LRA. Since old
> reload pass is still used, add option -mlra for those targets.
>
> For hppa, register 0 cannot be used as a general register. Therefore,
> use temporary registers r20 and r21 instead.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.dg/asm-hard-reg-error-4.c: Add option -mlra for targets
> hppa, m68k, pdp11, rx, sh, vax. Use registers r20 and r21 for
> hppa.
> * gcc.dg/asm-hard-reg-error-5.c: Ditto.
> ---
> Verified via cross compilers for hppa64-linux-gnu, m68k-linux-gnu,
> pdp11-aout, rx-elf, sh4eb-linux-gnu, vax-linux-gnu. Ok for mainline?
>
> gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c | 15 ++++++++++++---
> gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c | 13 +++++++++++--
> 2 files changed, 23 insertions(+), 5 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c
> b/gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c
> index 465f24b1f71..e408f157dd3 100644
> --- a/gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c
> +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c
> @@ -1,21 +1,30 @@
> /* { dg-do compile } */
> +/* { dg-additional-options "-mlra" { target hppa*-*-* m68*-*-* pdp11-*-*
> rx*-*-* sh*-*-* vax-*-* } } */
Why not use just:
/* { dg-additional-options "-mlra" { target { ! lra } } } */
Or limit the testcase to lra targets like:
/* { dg-do compile { target lra } } */
Hopefully the old reload goes away during GCC 16 ...
Thanks,
Andrew
>
> /* Verify output operands. */
>
> +#ifdef __hppa__
> +# define R0 "20"
> +# define R1 "21"
> +#else
> +# define R0 "0"
> +# define R1 "1"
> +#endif
> +
> int
> test (void)
> {
> int x;
> - register int y __asm__ ("0");
> + register int y __asm__ (R0);
>
> /* Preserve status quo and don't error out. */
> __asm__ ("" : "=r" (x), "=r" (x));
>
> /* Be more strict for hard register constraints and error out. */
> - __asm__ ("" : "={0}" (x), "={1}" (x)); /* { dg-error "multiple outputs to
> lvalue 'x'" } */
> + __asm__ ("" : "={"R0"}" (x), "={"R1"}" (x)); /* { dg-error "multiple
> outputs to lvalue 'x'" } */
>
> /* Still error out in case of a mixture. */
> - __asm__ ("" : "=r" (x), "={1}" (x)); /* { dg-error "multiple outputs to
> lvalue 'x'" } */
> + __asm__ ("" : "=r" (x), "={"R1"}" (x)); /* { dg-error "multiple outputs to
> lvalue 'x'" } */
>
> return x + y;
> }
> diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c
> b/gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c
> index 85398f04cc8..da5d24ad7f4 100644
> --- a/gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c
> +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c
> @@ -1,13 +1,22 @@
> /* { dg-do compile } */
> +/* { dg-additional-options "-mlra" { target hppa*-*-* m68*-*-* pdp11-*-*
> rx*-*-* sh*-*-* vax-*-* } } */
>
> /* Test clobbers.
> See asm-hard-reg-error-{2,3}.c for tests involving register pairs. */
>
> +#ifdef __hppa__
> +# define R0 "20"
> +# define R1 "21"
> +#else
> +# define R0 "0"
> +# define R1 "1"
> +#endif
> +
> int
> test (void)
> {
> int x, y;
> - __asm__ ("" : "={0}" (x), "={1}" (y) : : "1"); /* { dg-error "hard
> register constraint for output 1 conflicts with 'asm' clobber list" } */
> - __asm__ ("" : "={0}" (x) : "{0}" (y), "{1}" (y) : "1"); /* { dg-error
> "hard register constraint for input 1 conflicts with 'asm' clobber list" } */
> + __asm__ ("" : "={"R0"}" (x), "={"R1"}" (y) : : R1); /* { dg-error "hard
> register constraint for output 1 conflicts with 'asm' clobber list" } */
> + __asm__ ("" : "={"R0"}" (x) : "{"R0"}" (y), "{"R1"}" (y) : R1); /* {
> dg-error "hard register constraint for input 1 conflicts with 'asm' clobber
> list" } */
> return x + y;
> }
> --
> 2.49.0
>
