On 8/7/25 8:55 PM, Andrew Pinski wrote:
Now there are mergeable sections which have an entity size, we can place
decls (constants) that are smaller in size in these sections.
An example is an `long double` which has a size of 12 bytes on i686 and is
placed in the 16 bytes shareable section.
For an example with the following C++ code:
```
std::initializer_list<long double> a = {0.3l};
```
We place the constant array in the .rodata.cst16 section but we don't add a
padding to 16 bytes.
```
.section .rodata.cst16,"aM",@progbits,16
.align 16
.type _ZGR1a_, @object
.size _ZGR1a_, 12
_ZGR1a_:
.long -1717986918
.long -1717986919
.long 16381
.text
```
GAS has a workaround added to do the padding but other assemblers don't.
The gas workaround was added with
https://sourceware.org/legacy-ml/binutils/2002-11/msg00615.html .
Now for the constant pool, GCC does emit a `.align` to padd out the size
correctly.
This was done in r0-46282-gf41115930523b3.
The same padding should be done when emitting a variable contents when in a
mergeable section.
This patch implements the padding and we now get an addition `.zero 4` which
pads out the section.
Bootstrapped and tested on x86_64-linux-gnu.
PR middle-end/121394
gcc/ChangeLog:
* varasm.cc (assemble_variable_contents): Pad out
mergeable sections if needed.
(output_constant_pool_1): Change the padding to be explicit
zeroing for mergeable sections.
OK
jeff
