Hello!
This patch introduces TARGET_REJECT_COMBINED_INSN target hook, so
targets are able to reject combinations of two or more insns. The hook
is called from recog_for_combine, so it is the target that has the
final say on the combined insn.
This target hook will be used in a follow-up x86 patch that rejects
instructions where hard registers don't fit into operand register
constraint.
2012-08-23 Uros Bizjak <ubiz...@gmail.com>
* target.def (reject_combined_insn): New target hook.
* doc/tm.texi.in (TARGET_REJECT_COMBINED_INSN): New hook.
* doc/tm.texi: Regenerated.
* combine.c (recog_for_combine): Call targetm.reject_combined_insn
to allow targets to reject combined insn.
Bootstrapped and regression tested on x86_64-pc-linux-gnu.
OK for mainline?
Uros.
Index: combine.c
===================================================================
--- combine.c (revision 190500)
+++ combine.c (working copy)
@@ -10507,6 +10507,7 @@ recog_for_combine (rtx *pnewpat, rtx insn, rtx *pn
int i;
rtx notes = 0;
rtx old_notes, old_pat;
+ int old_icode;
/* If PAT is a PARALLEL, check to see if it contains the CLOBBER
we use to indicate that something didn't match. If we find such a
@@ -10566,6 +10567,7 @@ recog_for_combine (rtx *pnewpat, rtx insn, rtx *pn
print_rtl_single (dump_file, pat);
}
}
+
PATTERN (insn) = old_pat;
REG_NOTES (insn) = old_notes;
@@ -10607,6 +10609,29 @@ recog_for_combine (rtx *pnewpat, rtx insn, rtx *pn
pat = newpat;
}
+ if (insn_code_number >= 0
+ && insn_code_number != NOOP_MOVE_INSN_CODE)
+ {
+ old_pat = PATTERN (insn);
+ old_notes = REG_NOTES (insn);
+ old_icode = INSN_CODE (insn);
+ PATTERN (insn) = pat;
+ REG_NOTES (insn) = notes;
+
+ /* Allow targets to reject combined insn. */
+ if (targetm.reject_combined_insn (insn))
+ {
+ if (dump_file && (dump_flags & TDF_DETAILS))
+ fputs ("Instruction not appropriate for target.",
+ dump_file);
+ insn_code_number = -1;
+ }
+
+ PATTERN (insn) = old_pat;
+ REG_NOTES (insn) = old_notes;
+ INSN_CODE (insn) = old_icode;
+ }
+
*pnewpat = pat;
*pnotes = notes;
Index: doc/tm.texi
===================================================================
--- doc/tm.texi (revision 190500)
+++ doc/tm.texi (working copy)
@@ -10938,6 +10938,12 @@ By default, the RTL loop optimizer does not use a
loops containing function calls or branch on table instructions.
@end deftypefn
+@deftypefn {Target Hook} bool TARGET_REJECT_COMBINED_INSN (rtx @var{insn})
+
+Take an instruction in @var{insn} and return @code{true} if the insn
+should be rejected as a combination of two or more instructions.
+@end deftypefn
+
@defmac MD_CAN_REDIRECT_BRANCH (@var{branch1}, @var{branch2})
Take a branch insn in @var{branch1} and another in @var{branch2}.
Index: doc/tm.texi.in
===================================================================
--- doc/tm.texi.in (revision 190500)
+++ doc/tm.texi.in (working copy)
@@ -10796,6 +10796,12 @@ By default, the RTL loop optimizer does not use a
loops containing function calls or branch on table instructions.
@end deftypefn
+@hook TARGET_REJECT_COMBINED_INSN
+
+Take an instruction in @var{insn} and return @code{true} if the insn
+should be rejected as a combination of two or more instructions.
+@end deftypefn
+
@defmac MD_CAN_REDIRECT_BRANCH (@var{branch1}, @var{branch2})
Take a branch insn in @var{branch1} and another in @var{branch2}.
Index: target.def
===================================================================
--- target.def (revision 190500)
+++ target.def (working copy)
@@ -1984,7 +1984,15 @@ DEFHOOK
const char *, (const_rtx insn),
default_invalid_within_doloop)
+/* Returns true if the combined insn should be rejected
+ for some reason. */
DEFHOOK
+(reject_combined_insn,
+ "",
+ bool, (rtx insn),
+ hook_bool_rtx_false)
+
+DEFHOOK
(valid_dllimport_attribute_p,
"@var{decl} is a variable or function with @code{__attribute__((dllimport))}\
specified. Use this hook if the target needs to add extra validation\
