On 17/09/25 2:10 pm, Avinash Jayakar wrote:
> Hi,
>
> Following is version 5 of the patch proposed for master to fix PR119702.
> This patch has been bootstrapped and regtested on powerpc64le-linux.
> Kindly review the patch.
>
> Thanks and regards,
> Avinash Jayakar
>
> Changes from v4:
> 1. Added comments for the new predicate "vector_constant_1".
> 2. Added new tests for altivec vector types.
So the current gcc code does not handle altivec vector types too?
> 3. Added comments in test file.
> Changes from v3:
> 1. Add author information before changelog.
> 2. Right placement of PR target/119702.
> 3. Added new test to check multiply by 2 generates vadd insn.
> Changes from v2:
> 1. Indentation fixes in the commit message
> 2. define_insn has the name *altivec_vsl<VI_char>_const_1
The name for define_insn has been removed in this patch. Please add it
back.
> diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
> index 7edc288a656..4fa34864ed3 100644
> --- a/gcc/config/rs6000/altivec.md
> +++ b/gcc/config/rs6000/altivec.md
> @@ -2107,6 +2107,14 @@
> "vsrv %0,%1,%2"
> [(set_attr "type" "vecsimple")])
>
> +(define_insn ""
> + [(set (match_operand:VI2 0 "register_operand" "=v")
> + (ashift:VI2 (match_operand:VI2 1 "register_operand" "v")
> + (match_operand:VI2 2 "vector_constant_1" "")))]
> + "<VI_unit>"
> + "vaddu<VI_char>m %0,%1,%1"
> +)
> +
> (define_insn "*altivec_vsl<VI_char>"
> [(set (match_operand:VI2 0 "register_operand" "=v")
> (ashift:VI2 (match_operand:VI2 1 "register_operand" "v")
> diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
> index 647e89afb6a..c3e40890673 100644
> --- a/gcc/config/rs6000/predicates.md
> +++ b/gcc/config/rs6000/predicates.md
> @@ -924,6 +924,18 @@
> }
> })
>
> +;; Return 1 if the operand is a vector constant with 1 in all of the
> elements.
> +(define_predicate "vector_constant_1"
> + (match_code "const_vector")
> +{
> + unsigned nunits = GET_MODE_NUNITS (mode), i;
> + for (i = 0; i < nunits; i++) {
> + if (INTVAL (CONST_VECTOR_ELT(op, i)) != 1)
> + return 0;
> + }
> + return 1;
> +})
> +
> ;; Return 1 if operand is 0.0.
> (define_predicate "zero_fp_constant"
> (and (match_code "const_double")> diff --git
> a/gcc/testsuite/gcc.target/powerpc/pr119702-4.c
> b/gcc/testsuite/gcc.target/powerpc/pr119702-4.c
> new file mode 100644
> index 00000000000..1f745451c0a
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr119702-4.c
> @@ -0,0 +1,36 @@
> +/* { dg-do compile { target lp64 } } */
lp64 is not required. The ISA does not say that the vaddu<x>m instructions
are only for lp64 mode.
> +/* { dg-options "-O2 -maltivec -mdejagnu-cpu=power10" } */
Why do we need power10 here? And if you are specifying power10, there is no
need to specify -maltivec.
Same comments for the test pr119702-3.c too.
Surya
