...over "bit-wise" and "element-wise".
Sandra suggested this, and it makes sense. With that gcc/doc/ looks clean
wrt. these two.
Gerald
gcc:
* doc/invoke.texi (Warning Options): Use "bitwise" over
"bit-wise".
* doc/extend.texi (Vector Extensions): Use "elementwise"
over "element-wise".
* doc/md.texi (Standard Names): Ditto.
---
gcc/doc/extend.texi | 2 +-
gcc/doc/invoke.texi | 4 ++--
gcc/doc/md.texi | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index d6a2f724cab..7f01f2cb7b8 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -16529,7 +16529,7 @@ result of the comparison is a vector of the same width
and number of
elements as the comparison operands with a signed integral element
type.
-Vectors are compared element-wise producing 0 when the comparison is false
+Vectors are compared elementwise producing 0 when the comparison is false
and -1 (a constant of the appropriate type where all bits are set)
otherwise. Consider the following example:
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index e1bf45aaf4e..cea83f62c5f 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -10136,7 +10136,7 @@ void h (char *s)
@opindex Wno-date-time
@item -Wdate-time
Warn when macros @code{__TIME__}, @code{__DATE__} or @code{__TIMESTAMP__}
-are encountered as they might prevent bit-wise-identical reproducible
+are encountered as they might prevent bitwise-identical reproducible
compilations.
@opindex Wempty-body
@@ -10376,7 +10376,7 @@ enabled by default.
@item -Wlogical-op
Warn about suspicious uses of logical operators in expressions.
This includes using logical operators in contexts where a
-bit-wise operator is likely to be expected. Also warns when
+bitwise operator is likely to be expected. Also warns when
the operands of a logical operator are the same:
@smallexample
extern int a;
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index bac22b63380..44e1149bea8 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -5330,7 +5330,7 @@ The split is possible in this case if:
@item @samp{vec_cmp@var{m}@var{n}}
Output a vector comparison. Operand 0 of mode @var{n} is the destination for
predicate in operand 1 which is a signed vector comparison with operands of
-mode @var{m} in operands 2 and 3. Predicate is computed by element-wise
+mode @var{m} in operands 2 and 3. Predicate is computed by elementwise
evaluation of the vector comparison with a truth value of all-ones and a false
value of all-zeros.
--
2.51.0