---
gcc/config/arm/arm-protos.h | 1 +
gcc/config/arm/arm.cc | 43 ++++++++++++++++++++++++++++--
libgcc/config/arm/libgcc-bpabi.ver | 8 ++++++
libgcc/config/arm/t-softfp | 2 ++
4 files changed, 52 insertions(+), 2 deletions(-)
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index ff7e7658f91..9478cb57de5 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -209,6 +209,7 @@ extern bool arm_pad_reg_upward (machine_mode, tree, int);
#endif
extern int arm_apply_result_size (void);
extern opt_machine_mode arm_get_mask_mode (machine_mode mode);
+extern bool arm_bitint_type_info (int, struct bitint_info *);
extern bool arm_noce_conversion_profitable_p (rtx_insn *,struct noce_if_info *);
#endif /* RTX_CODE */
diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 8b951f3d4a6..f7397f81127 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -840,6 +840,9 @@ static const scoped_attribute_specs *const arm_attribute_table[] =
#undef TARGET_VECTORIZE_GET_MASK_MODE
#define TARGET_VECTORIZE_GET_MASK_MODE arm_get_mask_mode
+
+#undef TARGET_C_BITINT_TYPE_INFO
+#define TARGET_C_BITINT_TYPE_INFO arm_bitint_type_info
/* Obstack for minipool constant handling. */
static struct obstack minipool_obstack;
@@ -6090,6 +6093,7 @@ arm_return_in_memory (const_tree type, const_tree fntype)
We don't care about which register here, so we can short-cut
some of the detail. */
if (!AGGREGATE_TYPE_P (type)
+ && TREE_CODE (type) != BITINT_TYPE
&& TREE_CODE (type) != VECTOR_TYPE
&& TREE_CODE (type) != COMPLEX_TYPE)
return false;
@@ -6119,8 +6123,8 @@ arm_return_in_memory (const_tree type, const_tree fntype)
if (TREE_CODE (type) == VECTOR_TYPE)
return (size < 0 || size > (4 * UNITS_PER_WORD));
- if (!AGGREGATE_TYPE_P (type) &&
- (TREE_CODE (type) != VECTOR_TYPE))
+ if (!AGGREGATE_TYPE_P (type)
+ && TREE_CODE (type) != BITINT_TYPE)
/* All simple types are returned in registers. */
return false;
@@ -7179,6 +7183,12 @@ arm_needs_doubleword_align (machine_mode mode, const_tree type)
if (!type)
return GET_MODE_ALIGNMENT (mode) > PARM_BOUNDARY;
+ /* _BitInt(N) where N > 64 is implemented as an array of int64_t[M] for Arm
+ and is double word aligned. */
+ if (TREE_CODE (type) == BITINT_TYPE
+ && int_size_in_bytes (type) > 8)
+ return 1;
+
/* Scalar and vector types: Use natural alignment, i.e. of base type. */
if (!AGGREGATE_TYPE_P (type))
return TYPE_ALIGN (TYPE_MAIN_VARIANT (type)) > PARM_BOUNDARY;
@@ -35819,6 +35829,35 @@ arm_get_mask_mode (machine_mode mode)
return default_get_mask_mode (mode);
}
+/* Implement TARGET_C_BITINT_TYPE_INFO
+ Return true if _BitInt(N) is supported and fill its details into *INFO. */
+
+bool
+arm_bitint_type_info (int n, struct bitint_info *info)
+{
+ if (TARGET_BIG_END)
+ return false;
+
+ if (n <= 8)
+ info->limb_mode = QImode;
+ else if (n <= 16)
+ info->limb_mode = HImode;
+ else if (n <= 32)
+ info->limb_mode = SImode;
+ else if (n <= 64)
+ info->limb_mode = DImode;
+ else
+ info->limb_mode = SImode;
+
+ if (n > 64)
+ info->abi_limb_mode = DImode;
+ else
+ info->abi_limb_mode = info->limb_mode;
+ info->big_endian = TARGET_BIG_END;
+ info->extended = true;
+ return true;
+}
+
/* Helper function to determine whether SEQ represents a sequence of
instructions representing the vsel<cond> floating point instructions.
This is an heuristic to check whether the proposed optimisation is desired,
diff --git a/libgcc/config/arm/libgcc-bpabi.ver b/libgcc/config/arm/libgcc-bpabi.ver
index e4fe021cc47..7d517145c6f 100644
--- a/libgcc/config/arm/libgcc-bpabi.ver
+++ b/libgcc/config/arm/libgcc-bpabi.ver
@@ -106,3 +106,11 @@ GCC_3.5 {
GCC_4.3.0 {
_Unwind_Backtrace
}
+
+GCC_16.0.0 {
+ __fixsfbitint
+ __fixdfbitint
+ __floatbitinthf
+ __floatbitintsf
+ __floatbitintdf
+}
diff --git a/libgcc/config/arm/t-softfp b/libgcc/config/arm/t-softfp
index 554ec9bc47b..68aff4de068 100644
--- a/libgcc/config/arm/t-softfp
+++ b/libgcc/config/arm/t-softfp
@@ -1,2 +1,4 @@
softfp_wrap_start := '\#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1'
softfp_wrap_end := '\#endif'
+bitint_extras += floatbitinthf
+softfp_cflags := -mfp16-format=ieee
