The code checking whether we have a single cycle and tracking the
reduction chain was not transitioned to full SLP which now shows
when having a SLP reduction chain built after associating the
reduction operation.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
* tree-vect-loop.cc (vectorizable_reduction): SLP-ify reduction
operation processing a bit more.
* gcc.dg/vect/vect-pr122406-1.c: Adjust to expect reduction
chain vectorization.
* gcc.dg/vect/vect-pr122406-2.c: Likewise.
---
gcc/testsuite/gcc.dg/vect/vect-pr122406-1.c | 4 ++++
gcc/testsuite/gcc.dg/vect/vect-pr122406-2.c | 4 ++++
gcc/tree-vect-loop.cc | 14 ++++++--------
3 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/vect/vect-pr122406-1.c
b/gcc/testsuite/gcc.dg/vect/vect-pr122406-1.c
index a67a01c2cca..c756ff34c52 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-pr122406-1.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-pr122406-1.c
@@ -7,3 +7,7 @@ int f(long l, short *sp) {
us += sp[1] + sp[3];
return us;
}
+
+/* ??? Both SVE and RVV refuse to do the { 1, 3 } permutation as two ld2
+ or ld1 with odd extract plus lo/hi concat. Instead they prefer ld4. */
+/* { dg-final { scan-tree-dump "vectorizing a reduction chain" "vect" { target
{ { vect_extract_even_odd && vect_int } && { ! vect_variable_length } } } } } */
diff --git a/gcc/testsuite/gcc.dg/vect/vect-pr122406-2.c
b/gcc/testsuite/gcc.dg/vect/vect-pr122406-2.c
index 0bce77d3f31..8b69625bb53 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-pr122406-2.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-pr122406-2.c
@@ -6,3 +6,7 @@ int f(long l, short *sp) {
us += sp[1] + sp[3];
return us;
}
+
+/* ??? Both SVE and RVV refuse to do the { 1, 3 } permutation as two ld2
+ or ld1 with odd extract plus lo/hi concat. Instead they prefer ld4. */
+/* { dg-final { scan-tree-dump "vectorizing a reduction chain" "vect" { target
{ { vect_extract_even_odd && vect_int } && { ! vect_variable_length } } } } } */
diff --git a/gcc/tree-vect-loop.cc b/gcc/tree-vect-loop.cc
index 0424c28e27e..b1a9500cce0 100644
--- a/gcc/tree-vect-loop.cc
+++ b/gcc/tree-vect-loop.cc
@@ -7153,11 +7153,7 @@ vectorizable_reduction (loop_vec_info loop_vinfo,
reduction variable. */
slp_tree *slp_op = XALLOCAVEC (slp_tree, op.num_ops);
tree *vectype_op = XALLOCAVEC (tree, op.num_ops);
- /* We need to skip an extra operand for COND_EXPRs with embedded
- comparison. */
- unsigned opno_adjust = 0;
- if (op.code == COND_EXPR && COMPARISON_CLASS_P (op.ops[0]))
- opno_adjust = 1;
+ gcc_assert (op.code != COND_EXPR || !COMPARISON_CLASS_P (op.ops[0]));
for (i = 0; i < (int) op.num_ops; i++)
{
/* The condition of COND_EXPR is checked in vectorizable_condition(). */
@@ -7167,7 +7163,7 @@ vectorizable_reduction (loop_vec_info loop_vinfo,
stmt_vec_info def_stmt_info;
enum vect_def_type dt;
if (!vect_is_simple_use (loop_vinfo, slp_for_stmt_info,
- i + opno_adjust, &op.ops[i], &slp_op[i], &dt,
+ i, &op.ops[i], &slp_op[i], &dt,
&vectype_op[i], &def_stmt_info))
{
if (dump_enabled_p ())
@@ -7178,12 +7174,14 @@ vectorizable_reduction (loop_vec_info loop_vinfo,
/* Skip reduction operands, and for an IFN_COND_OP we might hit the
reduction operand twice (once as definition, once as else). */
- if (op.ops[i] == op.ops[STMT_VINFO_REDUC_IDX (stmt_info)])
+ if (SLP_TREE_CHILDREN (slp_for_stmt_info)[i]
+ == SLP_TREE_CHILDREN
+ (slp_for_stmt_info)[SLP_TREE_REDUC_IDX (slp_for_stmt_info)])
continue;
/* There should be only one cycle def in the stmt, the one
leading to reduc_def. */
- if (VECTORIZABLE_CYCLE_DEF (dt))
+ if (SLP_TREE_CHILDREN (slp_for_stmt_info)[i]->cycle_info.id != -1)
return false;
if (!vectype_op[i])
--
2.51.0
