From: Christophe Lyon <[email protected]>

Implement sqrshrl and sqrshrl_sat48 using the new MVE builtins
framework.

gcc/ChangeLog:
        * config/arm/arm-mve-builtins-base.cc (enum which_scalar_shift):
        Add ss_SQRSHRL, ss_SQRSHRL_SAT48.
        (mve_function_scalar_shift): Add support for ss_SQRSHRL,
        ss_SQRSHRL_SAT48.
        (sqrshrl, sqrshrl_sat48): New.
        * config/arm/arm-mve-builtins-base.def (sqrshrl, sqrshrl_sat48): New.
        * config/arm/arm-mve-builtins-base.h (sqrshrl, sqrshrl_sat48): New.
        * config/arm/arm_mve.h (sqrshrl): Delete.
        (sqrshrl_sat48): Delete.
        (__arm_sqrshrl): Delete.
        (__arm_sqrshrl_sat48): Delete.
        * config/arm/mve.md (mve_sqrshrl_sat<supf>_di): Add '@' prefix.
---
 gcc/config/arm/arm-mve-builtins-base.cc  | 12 ++++++++++++
 gcc/config/arm/arm-mve-builtins-base.def |  2 ++
 gcc/config/arm/arm-mve-builtins-base.h   |  2 ++
 gcc/config/arm/arm_mve.h                 | 16 ----------------
 gcc/config/arm/mve.md                    |  2 +-
 5 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc
index 9f3b83355c9..a192252f35a 100644
--- a/gcc/config/arm/arm-mve-builtins-base.cc
+++ b/gcc/config/arm/arm-mve-builtins-base.cc
@@ -1246,6 +1246,8 @@ public:
 enum which_scalar_shift {
   ss_ASRL,
   ss_LSLL,
+  ss_SQRSHRL,
+  ss_SQRSHRL_SAT48,
   ss_UQRSHLL,
   ss_UQRSHLL_SAT48,
 };
@@ -1277,6 +1279,14 @@ public:
 	code = CODE_FOR_mve_lsll;
 	break;
 
+      case ss_SQRSHRL:
+	code = code_for_mve_sqrshrl_sat_di (SQRSHRL_64);
+	break;
+
+      case ss_SQRSHRL_SAT48:
+	code = code_for_mve_sqrshrl_sat_di (SQRSHRL_48);
+	break;
+
       case ss_UQRSHLL:
 	code = code_for_mve_uqrshll_sat_di (UQRSHLL_64);
 	break;
@@ -1462,6 +1472,8 @@ namespace arm_mve {
 
 FUNCTION (asrl, mve_function_scalar_shift, (ss_ASRL))
 FUNCTION (lsll, mve_function_scalar_shift, (ss_LSLL))
+FUNCTION (sqrshrl, mve_function_scalar_shift, (ss_SQRSHRL))
+FUNCTION (sqrshrl_sat48, mve_function_scalar_shift, (ss_SQRSHRL_SAT48))
 FUNCTION (uqrshll, mve_function_scalar_shift, (ss_UQRSHLL))
 FUNCTION (uqrshll_sat48, mve_function_scalar_shift, (ss_UQRSHLL_SAT48))
 FUNCTION_PRED_P_S_U (vabavq, VABAVQ)
diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def
index 29ca4045be3..6ecb05e877b 100644
--- a/gcc/config/arm/arm-mve-builtins-base.def
+++ b/gcc/config/arm/arm-mve-builtins-base.def
@@ -20,6 +20,8 @@
 #define REQUIRES_FLOAT false
 DEF_MVE_FUNCTION (asrl, scalar_s64_shift, none, none)
 DEF_MVE_FUNCTION (lsll, scalar_u64_shift, none, none)
+DEF_MVE_FUNCTION (sqrshrl, scalar_s64_shift, none, none)
+DEF_MVE_FUNCTION (sqrshrl_sat48, scalar_s64_shift, none, none)
 DEF_MVE_FUNCTION (uqrshll, scalar_u64_shift, none, none)
 DEF_MVE_FUNCTION (uqrshll_sat48, scalar_u64_shift, none, none)
 DEF_MVE_FUNCTION (vabavq, binary_acca_int32, all_integer, p_or_none)
diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h
index 953ae3d0894..2f047008573 100644
--- a/gcc/config/arm/arm-mve-builtins-base.h
+++ b/gcc/config/arm/arm-mve-builtins-base.h
@@ -25,6 +25,8 @@ namespace functions {
 
 extern const function_base *const asrl;
 extern const function_base *const lsll;
+extern const function_base *const sqrshrl;
+extern const function_base *const sqrshrl_sat48;
 extern const function_base *const uqrshll;
 extern const function_base *const uqrshll_sat48;
 extern const function_base *const vabavq;
diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index d27195efe97..704a04eba45 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -59,8 +59,6 @@
 #define vuninitializedq_f16(void) __arm_vuninitializedq_f16(void)
 #define vuninitializedq_f32(void) __arm_vuninitializedq_f32(void)
 #define sqrshr(__p0, __p1) __arm_sqrshr(__p0, __p1)
-#define sqrshrl(__p0, __p1) __arm_sqrshrl(__p0, __p1)
-#define sqrshrl_sat48(__p0, __p1) __arm_sqrshrl_sat48(__p0, __p1)
 #define sqshl(__p0, __p1) __arm_sqshl(__p0, __p1)
 #define sqshll(__p0, __p1) __arm_sqshll(__p0, __p1)
 #define srshr(__p0, __p1) __arm_srshr(__p0, __p1)
@@ -72,20 +70,6 @@
 #define urshrl(__p0, __p1) __arm_urshrl(__p0, __p1)
 #endif
 
-__extension__ extern __inline int64_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_sqrshrl (int64_t value, int32_t shift)
-{
-  return __builtin_mve_sqrshrl_sat64_di (value, shift);
-}
-
-__extension__ extern __inline int64_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_sqrshrl_sat48 (int64_t value, int32_t shift)
-{
-  return __builtin_mve_sqrshrl_sat48_di (value, shift);
-}
-
 __extension__ extern __inline uint64_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_uqshll (uint64_t value, const int shift)
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 62bb14d94cc..888837674ed 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -4291,7 +4291,7 @@
 ;;
 ;; [sqrshrl_di]
 ;;
-(define_insn "mve_sqrshrl_sat<supf>_di"
+(define_insn "@mve_sqrshrl_sat<supf>_di"
   [(set (match_operand:DI 0 "arm_low_register_operand" "=l")
 	(unspec:DI [(match_operand:DI 1 "arm_low_register_operand" "0")
 		    (match_operand:SI 2 "register_operand" "r")]

Reply via email to