Hi gcc-patches mailing list, Saurabh Jha <[email protected]> has requested that the following forgejo pull request be published on the mailing list.
Created on: 2025-10-28 12:52:52+00:00 Latest update: 2025-11-07 20:08:24+00:00 Changes: 16 changed files, 728 additions, 32 deletions Head revision: saurabh.jha/gcc-TEST ref mingw-data-types-abi commit e86e4e4e33bc91ffd8ec8ceff0546ecb87618ae6 Base revision: gcc/gcc-TEST ref trunk commit 59e688be49a929daaa6f44f2a0bfff33e789e66b r16-5077-g59e688be49a929 Merge base: 59e688be49a929daaa6f44f2a0bfff33e789e66b Full diff url: https://forge.sourceware.org/gcc/gcc-TEST/pulls/118.diff Discussion: https://forge.sourceware.org/gcc/gcc-TEST/pulls/118 Requested Reviewers: pinskia Hey, No major changes in this version apart from addressing comments on forge https://forge.sourceware.org/gcc/gcc-TEST/pulls/118 and on the mailing list https://gcc.gnu.org/pipermail/gcc-patches/2025-October/698921.html. In particular, 1. Using TARGET_LONG_DOUBLE_128 instead of TARGET_LONG_DOUBLE_64. 2. Using if in preference to #ifdef wherever possible. 3. Emitting seh_endproc only for aarch64-w64-mingw32 instead of all mingw targets. 4. Added Martin Vejbora <[email protected]> as coauthor to the second patch. Thanks, Saurabh Saurabh Jha (3): aarch64: mingw: emit seh_endproc as comment aarch64: mingw: Make long double 64 bit aarch64: mingw: Implement support for variadic ABI gcc/config/aarch64/aarch64-builtins.cc | 33 ++ gcc/config/aarch64/aarch64-coff.h | 19 +- gcc/config/aarch64/aarch64-protos.h | 1 + gcc/config/aarch64/aarch64.cc | 356 +++++++++++++++++- gcc/config/aarch64/aarch64.h | 16 + gcc/config/aarch64/cygming.h | 13 +- gcc/config/mingw/winnt.cc | 22 ++ gcc/config/mingw/winnt.h | 1 + .../aarch64/mingw/long_double_size.c | 23 ++ .../gcc.target/aarch64/mingw/mingw.exp | 41 ++ .../gcc.target/aarch64/mingw/variadic_hfa.c | 71 ++++ .../gcc.target/aarch64/mingw/variadic_hva.c | 89 +++++ .../gcc.target/aarch64/mingw/variadic_int.c | 41 ++ gcc/testsuite/lib/scanasm.exp | 12 +- libgfortran/configure | 10 +- libgfortran/configure.ac | 7 +- 16 files changed, 724 insertions(+), 31 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/mingw/long_double_size.c create mode 100644 gcc/testsuite/gcc.target/aarch64/mingw/mingw.exp create mode 100644 gcc/testsuite/gcc.target/aarch64/mingw/variadic_hfa.c create mode 100644 gcc/testsuite/gcc.target/aarch64/mingw/variadic_hva.c create mode 100644 gcc/testsuite/gcc.target/aarch64/mingw/variadic_int.c Changed files: - A: gcc/testsuite/gcc.target/aarch64/mingw/long_double_size.c - A: gcc/testsuite/gcc.target/aarch64/mingw/mingw.exp - A: gcc/testsuite/gcc.target/aarch64/mingw/variadic_hfa.c - A: gcc/testsuite/gcc.target/aarch64/mingw/variadic_hva.c - A: gcc/testsuite/gcc.target/aarch64/mingw/variadic_int.c - M: gcc/config/aarch64/aarch64-builtins.cc - M: gcc/config/aarch64/aarch64-coff.h - M: gcc/config/aarch64/aarch64-protos.h - M: gcc/config/aarch64/aarch64.cc - M: gcc/config/aarch64/aarch64.h - M: gcc/config/aarch64/cygming.h - M: gcc/config/mingw/winnt.cc - M: gcc/config/mingw/winnt.h - M: gcc/testsuite/lib/scanasm.exp - M: libgfortran/configure - M: libgfortran/configure.ac Saurabh Jha (3): aarch64: mingw: emit seh_endproc as comment aarch64: mingw: Make long double 64 bit aarch64: mingw: Implement support for variadic ABI gcc/config/aarch64/aarch64-builtins.cc | 33 ++ gcc/config/aarch64/aarch64-coff.h | 19 +- gcc/config/aarch64/aarch64-protos.h | 1 + gcc/config/aarch64/aarch64.cc | 361 +++++++++++++++++- gcc/config/aarch64/aarch64.h | 16 + gcc/config/aarch64/cygming.h | 13 +- gcc/config/mingw/winnt.cc | 22 ++ gcc/config/mingw/winnt.h | 1 + .../aarch64/mingw/long_double_size.c | 23 ++ .../gcc.target/aarch64/mingw/mingw.exp | 41 ++ .../gcc.target/aarch64/mingw/variadic_hfa.c | 71 ++++ .../gcc.target/aarch64/mingw/variadic_hva.c | 89 +++++ .../gcc.target/aarch64/mingw/variadic_int.c | 41 ++ gcc/testsuite/lib/scanasm.exp | 12 +- libgfortran/configure | 10 +- libgfortran/configure.ac | 7 +- 16 files changed, 728 insertions(+), 32 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/mingw/long_double_size.c create mode 100644 gcc/testsuite/gcc.target/aarch64/mingw/mingw.exp create mode 100644 gcc/testsuite/gcc.target/aarch64/mingw/variadic_hfa.c create mode 100644 gcc/testsuite/gcc.target/aarch64/mingw/variadic_hva.c create mode 100644 gcc/testsuite/gcc.target/aarch64/mingw/variadic_int.c Range-diff against v1: 1: 31ca3ca0742 ! 1: 16960859fdc mingw: emit end of procedure directive as comment @@ Metadata Author: Saurabh Jha <[email protected]> ## Commit message ## - mingw: emit end of procedure directive as comment + aarch64: mingw: emit seh_endproc as comment For mingw targets, there is no way to identify the end of function using assembly directives right now. @@ gcc/config/aarch64/aarch64-coff.h #define DATA_SECTION_ASM_OP "\t.data" ## gcc/testsuite/lib/scanasm.exp ## +@@ + # it under the terms of the GNU General Public License as published by + # the Free Software Foundation; either version 3 of the License, or + # (at your option) any later version. +-# ++# + # This program is distributed in the hope that it will be useful, + # but WITHOUT ANY WARRANTY; without even the implied warranty of + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + # GNU General Public License for more details. +-# ++# + # You should have received a copy of the GNU General Public License + # along with GCC; see the file COPYING3. If not see + # <http://www.gnu.org/licenses/>. +@@ gcc/testsuite/lib/scanasm.exp: proc scan-assembler-not { args } { + + set_required_options_for scan-assembler-not + +-# Return the scan for the assembly for hidden visibility. ++# Return the scan for the assembly for hidden visibility. + + proc hidden-scan-for { symbol } { + +@@ gcc/testsuite/lib/scanasm.exp: proc scan-assembler-times { args } { + + set_required_options_for scan-assembler-times + +-# Call pass if pattern is present within a lower or upper bound, ++# Call pass if pattern is present within a lower or upper bound, + # otherwise fail. + # ex /* { dg-final { scan-assembler-bound {RE} > 3 } } + proc scan-assembler-bound { args } { +@@ gcc/testsuite/lib/scanasm.exp: proc scan-assembler-bound { args } { + error "scan-assembler-bound: illegal argument: $bound" + return + } +- ++ + set fd [open $output_file r] + set text [read $fd] + close $fd @@ gcc/testsuite/lib/scanasm.exp: proc configure_check-function-bodies { config } { set up_config(end) {^\}$} } elseif { [istarget *-*-darwin*] } { set up_config(end) {^LFE[0-9]+} -+ } elseif { [istarget *-*-mingw32] } { ++ } elseif { [istarget aarch64*-*-mingw32] } { + set up_config(end) {seh_endproc} } else { set up_config(end) {^\s*\.size} 2: 91d484b22c2 ! 2: 3a88ad496f6 aarch64: mingw: Make long double 64 bit @@ Commit message gcc/ChangeLog: * config/aarch64/aarch64-coff.h - (TARGET_LONG_DOUBLE_64): Set the size of long double to 64 bits. + (TARGET_LONG_DOUBLE_128): Set this to 0. (__NO_BINARY80__): Define this so that __ENABLE_BINARY80__ is set to 0. * config/aarch64/aarch64.cc (aarch64_scalar_mode_supported_p): Make long double 64 bits. - (aarch64_c_mode_for_floating_type): Make long double 64 bits. + (aarch64_c_mode_for_floating_type): Return true for TFmode. + * config/aarch64/aarch64.h + (TARGET_LONG_DOUBLE_128): Set this to 1. libgfortran/ChangeLog: @@ Commit message * gcc.target/aarch64/mingw/long_double_size.c: New test. co-authored-by: Radek Barton <[email protected]> + co-authored-by: Martin Vejbora <[email protected]> ## gcc/config/aarch64/aarch64-coff.h ## @@ #undef PTRDIFF_TYPE #define PTRDIFF_TYPE "long long int" -+/* For Coff, the size of long double is 64 bits. ++/* Long double is 64 bit for Coff targets. + Reference: + https://learn.microsoft.com/en-us/cpp/c-language/type-long-double. */ -+#define TARGET_LONG_DOUBLE_64 1 ++#undef TARGET_LONG_DOUBLE_128 ++#define TARGET_LONG_DOUBLE_128 0 + #undef LONG_TYPE_SIZE #define LONG_TYPE_SIZE 32 @@ gcc/config/aarch64/aarch64.cc: aarch64_scalar_mode_supported_p (scalar_mode mode if (DECIMAL_FLOAT_MODE_P (mode)) return default_decimal_float_supported_p (); -+/* If long double is 64bit, we need to explicitly specify that aarch64 -+ port is prepared to handle TFmode instructions. -+ If long double is 128bit, this is handled by -+ default_scalar_mode_supported_p. -+*/ -+#ifdef TARGET_LONG_DOUBLE_64 + if (mode == TFmode) + return true; -+#endif + return ((mode == HFmode || mode == BFmode) ? true @@ gcc/config/aarch64/aarch64.cc: aarch64_bitint_type_info (int n, struct bitint_in static machine_mode aarch64_c_mode_for_floating_type (enum tree_index ti) { -+#ifndef TARGET_LONG_DOUBLE_64 - if (ti == TI_LONG_DOUBLE_TYPE) +- if (ti == TI_LONG_DOUBLE_TYPE) ++ if (TARGET_LONG_DOUBLE_128 && ti == TI_LONG_DOUBLE_TYPE) return TFmode; -+#endif return default_mode_for_floating_type (ti); } + + ## gcc/config/aarch64/aarch64.h ## +@@ gcc/config/aarch64/aarch64.h: enum reg_class + /* CPU/ARCH option handling. */ + #include "config/aarch64/aarch64-opts.h" ++/* Long double is stored in 128 bits by default. */ ++#ifndef TARGET_LONG_DOUBLE_128 ++#define TARGET_LONG_DOUBLE_128 1 ++#endif ++ + /* If there is no CPU defined at configure, use generic as default. */ + #ifndef TARGET_CPU_DEFAULT + # define TARGET_CPU_DEFAULT AARCH64_CPU_generic_armv8_a ## gcc/testsuite/gcc.target/aarch64/mingw/long_double_size.c (new) ## @@ @@ gcc/testsuite/gcc.target/aarch64/mingw/long_double_size.c (new) + +/** + * For aarch64-w64-mingw32 target, long double is 64 bits. Unlike in -+ * aarch64-linux-gnu, where long double is 128 bits. -+ * -+ * The tests below validate that. In aarch64-linux-gnu, the results would -+ * be the opposite. ++ * aarch64-linux-gnu, where long double is 128 bits. The tests below validate ++ * validate that. In aarch64-linux-gnu, the results would be the opposite. + */ + +/* @@ gcc/testsuite/gcc.target/aarch64/mingw/long_double_size.c (new) +} + +/* { dg-final { scan-assembler-not "ldr\tq\[0-9\]+, \[x\[0-9\]+\]*" } } */ - \ No newline at end of file ## gcc/testsuite/gcc.target/aarch64/mingw/mingw.exp (new) ## @@ 3: 350a5e6f20a ! 3: e86e4e4e33b aarch64: mingw: Implement support for variadic ABI @@ Commit message (aarch64_fntype_abi): Add support for variadic functions for aarch64-w64-mingw32 target. (aarch64_reg_save_mode): Add support for ARM_PCS_MS_VARIADIC. + (num_pcs_arg_regs): Add support for ARM_PCS_MS_VARIADIC. (aarch64_arg_size): Returns size of argument. (aarch64_ms_variadic_abi_layout_arg): aarch64-w64-mingw32 specific support for variadic ABI. @@ Commit message (aarch64_function_arg): Implement TARGET_FUNCTION_ARG. (aarch64_function_arg_advance): Add support for ARM_PCS_MS_VARIADIC. + (aarch64_function_arg_regno_p): Add support for + ARM_PCS_MS_VARIADIC. (aarch64_ms_variadic_abi_build_builtin_va_list): Implement TARGET_BUILD_BUILTIN_VA_LIST. (aarch64_ms_variadic_abi_expand_builtin_va_start): Implement @@ gcc/config/aarch64/aarch64-protos.h: gimple *aarch64_general_gimple_fold_builtin ## gcc/config/aarch64/aarch64.cc ## +@@ + #define HAVE_AS_AEABI_BUILD_ATTRIBUTES 0 + #endif + ++/* Not on Windows ABI unless explicitly set. */ ++#ifndef TARGET_AARCH64_MS_ABI ++#define TARGET_AARCH64_MS_ABI 0 ++#endif ++ + /* Flags that describe how a function shares certain architectural state + with its callers. + @@ gcc/config/aarch64/aarch64.cc: handle_aarch64_vector_pcs_attribute (tree *node, tree name, tree, *no_add_attrs = true; return NULL_TREE; +- /* Rely on the exclusions list for preserve_none. */ ++ /* Rely on the exclusions list for preserve_none. */ + case ARM_PCS_PRESERVE_NONE: + case ARM_PCS_MS_VARIADIC: case ARM_PCS_TLSDESC: case ARM_PCS_UNKNOWN: @@ gcc/config/aarch64/aarch64.cc: aarch64_takes_arguments_in_sve_regs_p (const_tree return false; } -+/* Returns true if a function has variadic arguments. */ ++/* Returns true if a function has variadic arguments. ++ Only works for Windows ABI. */ + -+#ifdef TARGET_AARCH64_MS_ABI +static bool +aarch64_ms_is_variadic_function_type (const_tree fntype) +{ ++ if (!TARGET_AARCH64_MS_ABI) ++ return false; ++ + if (TYPE_NO_NAMED_ARGS_STDARG_P (fntype)) + return true; + @@ gcc/config/aarch64/aarch64.cc: aarch64_takes_arguments_in_sve_regs_p (const_tree + + return arg_count > 0; +} -+#endif + +/* Return the descriptor of the Windows Arm64 variadic function call ABI. */ + @@ gcc/config/aarch64/aarch64.cc: aarch64_takes_arguments_in_sve_regs_p (const_tree static const predefined_function_abi & aarch64_fntype_abi (const_tree fntype) { -+#ifdef TARGET_AARCH64_MS_ABI + if (aarch64_ms_is_variadic_function_type (fntype)) + return aarch64_ms_variadic_abi (); -+#endif ++ + if (lookup_attribute ("ms_abi", TYPE_ATTRIBUTES (fntype))) + return aarch64_ms_variadic_abi (); + @@ gcc/config/aarch64/aarch64.cc: aarch64_reg_save_mode (unsigned int regno) case ARM_PCS_SIMD: /* The vector PCS saves the low 128 bits (which is the full register on non-SVE targets). */ -@@ gcc/config/aarch64/aarch64.cc: bitint_or_aggr_of_bitint_p (tree type) - return false; +@@ gcc/config/aarch64/aarch64.cc: num_pcs_arg_regs (enum arm_pcs pcs) + case ARM_PCS_SIMD: + case ARM_PCS_SVE: + case ARM_PCS_TLSDESC: ++ case ARM_PCS_MS_VARIADIC: + case ARM_PCS_UNKNOWN: + return NUM_ARG_REGS; + } +@@ gcc/config/aarch64/aarch64.cc: get_pcs_arg_reg (enum arm_pcs pcs, int num) + case ARM_PCS_SIMD: + case ARM_PCS_SVE: + case ARM_PCS_TLSDESC: ++ case ARM_PCS_MS_VARIADIC: + case ARM_PCS_UNKNOWN: + return R0_REGNUM + num; + } + gcc_unreachable (); } +static int @@ gcc/config/aarch64/aarch64.cc: aarch64_finish_sme_mode_switch_args (CUMULATIVE_A +/* Implement TARGET_ARG_PARTIAL_BYTES. */ + -+#ifdef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 1 +static int +aarch64_arg_partial_bytes (cumulative_args_t pcum_v, + const function_arg_info &arg ATTRIBUTE_UNUSED) @@ gcc/config/aarch64/aarch64.cc: aarch64_finish_sme_mode_switch_args (CUMULATIVE_A static rtx @@ gcc/config/aarch64/aarch64.cc: aarch64_function_arg (cumulative_args_t pcum_v, const function_arg_info &arg) - CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); gcc_assert (pcum->pcs_variant == ARM_PCS_AAPCS64 || pcum->pcs_variant == ARM_PCS_SIMD -- || pcum->pcs_variant == ARM_PCS_SVE); -+ || pcum->pcs_variant == ARM_PCS_SVE + || pcum->pcs_variant == ARM_PCS_SVE +- || pcum->pcs_variant == ARM_PCS_PRESERVE_NONE); ++ || pcum->pcs_variant == ARM_PCS_PRESERVE_NONE + || pcum->pcs_variant == ARM_PCS_MS_VARIADIC); if (arg.end_marker_p ()) { @@ gcc/config/aarch64/aarch64.cc: aarch64_function_arg_advance (cumulative_args_t pcum_v, - CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); if (pcum->pcs_variant == ARM_PCS_AAPCS64 || pcum->pcs_variant == ARM_PCS_SIMD -- || pcum->pcs_variant == ARM_PCS_SVE) -+ || pcum->pcs_variant == ARM_PCS_SVE + || pcum->pcs_variant == ARM_PCS_SVE +- || pcum->pcs_variant == ARM_PCS_PRESERVE_NONE) ++ || pcum->pcs_variant == ARM_PCS_PRESERVE_NONE + || pcum->pcs_variant == ARM_PCS_MS_VARIADIC) { aarch64_layout_arg (pcum_v, arg); @@ gcc/config/aarch64/aarch64.cc: aarch64_function_arg_advance (cumulative_args_t p if (pcum->aapcs_reg && aarch64_call_switches_pstate_sm (pcum->isa_mode)) aarch64_record_sme_mode_switch_args (pcum); +@@ gcc/config/aarch64/aarch64.cc: aarch64_function_arg_regno_p (unsigned regno) + case ARM_PCS_SIMD: + case ARM_PCS_SVE: + case ARM_PCS_TLSDESC: ++ case ARM_PCS_MS_VARIADIC: + case ARM_PCS_UNKNOWN: + return ((GP_REGNUM_P (regno) && regno < R0_REGNUM + NUM_ARG_REGS) + || (FP_REGNUM_P (regno) && regno < V0_REGNUM + NUM_FP_ARG_REGS) @@ gcc/config/aarch64/aarch64.cc: static GTY(()) tree va_list_type; int __vr_offs; }; */ -+#ifndef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 0 static tree aarch64_build_builtin_va_list (void) { @@ gcc/config/aarch64/aarch64.cc: aarch64_build_builtin_va_list (void) + Setup the builtin va_list data type and for 64-bit the additional + calling convention specific va_list data types. */ + -+#ifdef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 1 +static tree +aarch64_ms_variadic_abi_build_builtin_va_list (void) +{ @@ gcc/config/aarch64/aarch64.cc: aarch64_build_builtin_va_list (void) +#endif /* Implement TARGET_EXPAND_BUILTIN_VA_START. */ -+#ifndef TARGET_AARCH64_MS_ABI ++ ++#if TARGET_AARCH64_MS_ABI == 0 static void aarch64_expand_builtin_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED) { @@ gcc/config/aarch64/aarch64.cc: aarch64_expand_builtin_va_start (tree valist, rtx + +/* Implement TARGET_EXPAND_BUILTIN_VA_START. */ + -+#ifdef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 1 +static void +aarch64_ms_variadic_abi_expand_builtin_va_start (tree valist, rtx nextarg) +{ @@ gcc/config/aarch64/aarch64.cc: aarch64_expand_builtin_va_start (tree valist, rtx + Note, do not iterate a base builtin's name like __builtin_va_list. + Used from c_common_nodes_and_builtins. */ + -+#ifdef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 1 +static int +aarch64_ms_variadic_abi_enum_va_list (int idx, const char **pname, tree *ptree) +{ @@ gcc/config/aarch64/aarch64.cc: aarch64_expand_builtin_va_start (tree valist, rtx +/* This function returns the calling abi specific va_list type node. + It returns the FNDECL specific va_list type. */ + -+#ifdef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 1 +static tree +aarch64_ms_variadic_abi_fn_abi_va_list (tree fndecl) +{ @@ gcc/config/aarch64/aarch64.cc: aarch64_expand_builtin_va_start (tree valist, rtx +/* Returns the canonical va_list type specified by TYPE. + If there is no valid TYPE provided, it return NULL_TREE. */ + -+#ifdef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 1 +static tree +aarch64_ms_variadic_abi_canonical_va_list_type (tree type) +{ @@ gcc/config/aarch64/aarch64.cc: aarch64_expand_builtin_va_start (tree valist, rtx /* Implement TARGET_GIMPLIFY_VA_ARG_EXPR. */ -+#ifndef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 0 static tree aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p, gimple_seq *post_p ATTRIBUTE_UNUSED) @@ gcc/config/aarch64/aarch64.cc: aarch64_setup_incoming_varargs (cumulative_args_t vr_saved = MIN (NUM_FP_ARG_REGS - local_cum.aapcs_nvrn, cfun->va_list_fpr_size / UNITS_PER_VREG); -+/* Windows variadic function calls ABI never uses vector registers. */ -+#ifndef TARGET_AARCH64_MS_ABI - if (!TARGET_FLOAT) -+#endif +- if (!TARGET_FLOAT) ++ /* Windows variadic function calls ABI never uses vector registers. */ ++ if (TARGET_AARCH64_MS_ABI || !TARGET_FLOAT) { gcc_assert (local_cum.aapcs_nvrn == 0); vr_saved = 0; @@ gcc/config/aarch64/aarch64.cc: static const char * { /* The AArch64 ABI documents say that "__va_list" has to be - mangled as if it is in the "std" namespace. */ +- if (lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type)) + mangled as if it is in the "std" namespace. + The Windows Arm64 ABI uses just an address of the first variadic + argument. */ -+#ifndef TARGET_AARCH64_MS_ABI - if (lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type)) ++ if (!TARGET_AARCH64_MS_ABI ++ && lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type)) return "St9__va_list"; -+#endif /* Half-precision floating point types. */ - if (SCALAR_FLOAT_TYPE_P (type) && TYPE_PRECISION (type) == 16) @@ gcc/config/aarch64/aarch64.cc: aarch64_post_cfi_startproc (FILE *f, tree ignored ATTRIBUTE_UNUSED) asm_fprintf (f, "\t.cfi_b_key_frame\n"); } @@ gcc/config/aarch64/aarch64.cc: aarch64_post_cfi_startproc (FILE *f, tree ignored + For Windows ABI of variadic function calls, treat the named arguments as + unnamed as they are handled the same way as variadic arguments. */ + -+#ifdef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 1 +static bool +aarch64_ms_variadic_abi_strict_argument_naming (cumulative_args_t pcum_v) +{ @@ gcc/config/aarch64/aarch64.cc: aarch64_post_cfi_startproc (FILE *f, tree ignored /* Implements TARGET_ASM_FILE_START. Output the assembly header. */ static void -@@ gcc/config/aarch64/aarch64.cc: aarch64_scalar_mode_supported_p (scalar_mode mode) - /* If long double is 64bit, we need to explicitly specify that aarch64 - port is prepared to handle TFmode instructions. - If long double is 128bit, this is handled by -- default_scalar_mode_supported_p. --*/ -+ default_scalar_mode_supported_p. */ - #ifdef TARGET_LONG_DOUBLE_64 - if (mode == TFmode) - return true; @@ gcc/config/aarch64/aarch64.cc: aarch64_run_selftests (void) #undef TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY #define TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY aarch64_print_patchable_function_entry -+#ifdef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 1 +#undef TARGET_BUILD_BUILTIN_VA_LIST +#define TARGET_BUILD_BUILTIN_VA_LIST \ + aarch64_ms_variadic_abi_build_builtin_va_list @@ gcc/config/aarch64/aarch64.cc: aarch64_run_selftests (void) #undef TARGET_EXPAND_BUILTIN #define TARGET_EXPAND_BUILTIN aarch64_expand_builtin -+#ifdef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 1 +#undef TARGET_ENUM_VA_LIST_P +#define TARGET_ENUM_VA_LIST_P aarch64_ms_variadic_abi_enum_va_list + @@ gcc/config/aarch64/aarch64.cc: aarch64_run_selftests (void) #undef TARGET_FOLD_BUILTIN #define TARGET_FOLD_BUILTIN aarch64_fold_builtin -+#ifdef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 1 +#undef TARGET_ARG_PARTIAL_BYTES +#define TARGET_ARG_PARTIAL_BYTES aarch64_arg_partial_bytes +#endif @@ gcc/config/aarch64/aarch64.cc: aarch64_run_selftests (void) #undef TARGET_GIMPLE_FOLD_BUILTIN #define TARGET_GIMPLE_FOLD_BUILTIN aarch64_gimple_fold_builtin -+#ifndef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 0 #undef TARGET_GIMPLIFY_VA_ARG_EXPR #define TARGET_GIMPLIFY_VA_ARG_EXPR aarch64_gimplify_va_arg_expr +#endif @@ gcc/config/aarch64/aarch64.cc: aarch64_libgcc_floating_mode_supported_p #undef TARGET_ASM_POST_CFI_STARTPROC #define TARGET_ASM_POST_CFI_STARTPROC aarch64_post_cfi_startproc -+#ifdef TARGET_AARCH64_MS_ABI ++#if TARGET_AARCH64_MS_ABI == 1 +#undef TARGET_STRICT_ARGUMENT_NAMING +#define TARGET_STRICT_ARGUMENT_NAMING \ + aarch64_ms_variadic_abi_strict_argument_naming @@ gcc/config/aarch64/aarch64.h: struct GTY (()) aarch64_frame of the outgoing arguments) and the bottom of the register save area. This value is always a multiple of STACK_BOUNDARY. */ @@ gcc/config/aarch64/aarch64.h: enum arm_pcs - ARM_PCS_SVE, /* For functions that pass or return - values in SVE registers. */ ARM_PCS_TLSDESC, /* For targets of tlsdesc calls. */ -+ ARM_PCS_MS_VARIADIC, /* Windows handles variadic functions + ARM_PCS_PRESERVE_NONE, /* PCS variant with no call-preserved + registers except X29. */ ++ ARM_PCS_MS_VARIADIC, /* PCS variant with no call-preserved + differently. + All composites are treated alike. + SIMD and floating-point registers -- 2.51.1
