Hi! On Thu, Dec 11, 2025 at 04:12:46PM -0700, Jeff Law wrote: > On 12/10/25 8:11 AM, Kishan Parmar wrote: > > The expression (A ^ B) & C ^ B is the canonical GIMPLE form because it > > optimizes for instruction count on generic targets. However, for > > targets that support ANDN (like PowerPC andc), the equivalent > > (A & C) | (B & ~C) form is preferable because it reduces register > > dependency chain.
It also is canonical RTL (the xor thing is not!) > > Currently, GCC generates the XOR form which creates a serial chain with > > two dependencies: > > xor 4,3,4 > > and 4,4,5 > > xor 3,4,3 > > > > With this patch, using IFN_BIT_ANDN, we generate the IOR form. This > > allows the two bitwise operations to execute independently, reducing > > the path to a single dependency for the final instruction: > > andc 3,3,5 > > and 2,4,5 > > or 3,2,3 Or even better an rl[wd]imi, or vsel/xxsel thing, with which we can do various special cases (and extended cases) of these in one insn. > > gcc/ChangeLog: > > PR tree-optimization/122431 target/90323 > > * config/rs6000/rs6000.md (andn<mode>3): New define_expand andn for > > scalar types. We already have way more generic patterns *bool<mode>3 (and _imm, and _dot, and _dot2, and *boolc of all these, etc.) It is silly we would need such an unsystematic name now. > > * match.pd: Add late simplification to convert to (A & C) | (B & ~C) > > form if target support ANDN optab. > FWIW, this ought to help RISC-V as well once we fix the port to use the > proper name. It helps *all* RISC-like archs. Segher
