On 1/12/2026 9:21 AM, Kito Cheng wrote:
This patch implements _BitInt support for RISC-V target by defining the
type layout and ABI requirements. The limb mode selection is based on
the bit width, using appropriate integer modes from QImode to TImode.
The implementation also adds the necessary libgcc version symbols for
_BitInt runtime support functions.
Changes in v3:
- Require sync_char_short effective target for bitint-64.c, bitint-82.c
and bitint-84.c tests since they use atomic operations.
- Add -fno-section-anchors to bitint-32-on-rv64.c and adjust expected
assembly output patterns.
Changes in v2:
- limb_mode use up to XLEN when N > XLEN, which is different setting from
the abi_limb_mode.
- Adding missing floatbitinthf in libgcc.
gcc/ChangeLog:
PR target/117581
* config/riscv/riscv.cc (riscv_bitint_type_info): New function.
(TARGET_C_BITINT_TYPE_INFO): Define.
gcc/testsuite/ChangeLog:
PR target/117581
* gcc.dg/torture/bitint-64.c: Add sync_char_short effective target
requirement.
* gcc.dg/torture/bitint-82.c: Likewise.
* gcc.dg/torture/bitint-84.c: Likewise.
* gcc.target/riscv/bitint-32-on-rv64.c: New test.
* gcc.target/riscv/bitint-alignments.c: New test.
* gcc.target/riscv/bitint-args.c: New test.
* gcc.target/riscv/bitint-sizes.c: New test.
libgcc/ChangeLog:
PR target/117581
* config/riscv/libgcc-riscv.ver: New file.
* config/riscv/t-elf (SHLIB_MAPFILES): Add libgcc-riscv.ver.
* config/riscv/t-softfp32 (softfp_extras): Add floatbitinttf and
fixtfbitint.
OK. Thanks for taking care of this.
jeff
