Thumb1 does not support shrink wrapping so the check for shrink
wrapping in pr46555.c needs to be disabled for that. It does work
with both thumb2 and arm modes.
Pushed after testing for arm with `-mthumb -march=armv8-m.base`,
`-marm -mcpu=cotext-a72` and `-mthumb -mcpu=cotext-a72` to make
sure the correct tests are happening and still pass.
PR testsuite/123751
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/pr46555.c: Disable for arm thumb1.
Signed-off-by: Andrew Pinski <[email protected]>
---
gcc/testsuite/gcc.dg/tree-ssa/pr46555.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr46555.c
b/gcc/testsuite/gcc.dg/tree-ssa/pr46555.c
index d4de7c2c170..7b10bcda868 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/pr46555.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr46555.c
@@ -25,4 +25,4 @@ int f(int a, int b, int c)
/* Make sure we only have a PHI with 2 arguments here, 2 and 4. */
/* { dg-final { scan-tree-dump "PHI <2..., 4...>|PHI <4..., 2...>" "optimized"
} } */
/* Make sure we can shrink wrap the function now too. */
-/* { dg-final { scan-rtl-dump "Performing shrink-wrapping" "pro_and_epilogue"
{ target { { { i?86-*-* x86_64-*-* } && { ! ia32 } } || { powerpc*-*-*
aarch64*-*-* riscv*-*-* arm*-*-* } } } } } */
+/* { dg-final { scan-rtl-dump "Performing shrink-wrapping" "pro_and_epilogue"
{ target { { { i?86-*-* x86_64-*-* } && { ! ia32 } } || { { powerpc*-*-*
aarch64*-*-* riscv*-*-* } || { arm*-*-* && { ! arm_thumb1 } } } } } } } */
--
2.43.0
