When adding LoongArch32 ilp32s abi support, add TARGET_HARD_FLOAT condition for
movsf to prevent matching in target without FPU.
But movsf also needs to be used in lp64s abi, it can expand to some
non float instructions.
Delete TARGET_HARD_FLOAT condition.
gcc/ChangeLog:
* config/loongarch/loongarch.md: Delete movsf TARGET_HARD_FLOAT
condition.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/la64/movsf.c: New test.
---
gcc/config/loongarch/loongarch.md | 2 +-
gcc/testsuite/gcc.target/loongarch/la64/movsf.c | 16 ++++++++++++++++
2 files changed, 17 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/loongarch/la64/movsf.c
diff --git a/gcc/config/loongarch/loongarch.md
b/gcc/config/loongarch/loongarch.md
index 9dc9d6dffad..77b3298078a 100644
--- a/gcc/config/loongarch/loongarch.md
+++ b/gcc/config/loongarch/loongarch.md
@@ -2540,7 +2540,7 @@ (define_insn "*movqi_internal"
(define_expand "movsf"
[(set (match_operand:SF 0 "")
(match_operand:SF 1 ""))]
- "TARGET_HARD_FLOAT"
+ ""
{
if (loongarch_legitimize_move (SFmode, operands[0], operands[1]))
DONE;
diff --git a/gcc/testsuite/gcc.target/loongarch/la64/movsf.c
b/gcc/testsuite/gcc.target/loongarch/la64/movsf.c
new file mode 100644
index 00000000000..efe979c5289
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/la64/movsf.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mabi=lp64s" } */
+
+float
+__powisf2 (float x, int m)
+{
+ unsigned int n = m < 0 ? -(unsigned int) m : (unsigned int) m;
+ float y = n % 2 ? x : 1;
+ while (n >>= 1)
+ {
+ x = x * x;
+ if (n % 2)
+ y = y * x;
+ }
+ return m < 0 ? 1/y : y;
+}
--
2.34.1
